will not necessarily return the same status byte value as when using
a serial poll because the “Message in Output Queue” bit is always set
when using OUTPSTAT.
The status byte:
n summarizes the error queue
n summarizes two event-status registers that monitor specific conditions
inside the instrument
n contains a bit that is set when the instrument is issuing a service
request (SRQ) over BP-IB
l contains a bit that is set when the analyzer has data to transmit over
HP-IB
Any bit in the status byte can be selectively enabled to generate a
service request (SRQ) when set. Setting a bit in the service-request-
enable register with the SRErm
1
command enables the corresponding
bit in the status byte. The units variable nn represents the binary
equivalent of the bit in the status byte. Fbr example,
SRE24;
enables
status-byte bits 3 and 4 (since
23
+
24
= 24) and disables all the other
bits. SRE will not affect the state of the status-register bits.
The sequencing bit can be set during the execution of a test sequence to
assert an SRQ.
The status byte also summarizes two queues: the output queue and the
error queue. (The error queue is described in the next section.) When
the analyzer outputs information, it puts the information in the output
queue where it resides until the controller reads it. The output queue
is only one event long. Therefore, the next output request will clear
the current data. The summary bit is set whenever there is data in the
output queue.
The Event-Status Register and Event-Status
Register B
The event-status register and event-status register B are the other
two registers in the status-reporting structure. They are selectively
summarized by bits in the status byte via enable registers. The
event-status registers consist of latched bits. A latched bit is set at
the beginning of a specific trigger condition in the instrument. It can
only be cleared by reading the register. The bit will not be reactivated
until the condition occurs again. If a bit in one of these two registers is
enabled, it is summarized by the summary bit in the status byte. The
registers are enabled using the commands ESEnn
;
and
ESblE:rm;
, both
of which work in the same manner as Sl?Erm. The units variable
nn
represents the binary equivalent of the bit in the status byte.
l-46
HP-IB Programming and Command Reference Guide
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