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S:\HP8924C\USRGUIDE\BOOK\chapters\hpibstat.fb
Chapter 4, Status Reporting
Status Reporting
Table 10 CDMA_2 Status Register Group Bit Assignments
Bit Number
Is Condition
Register
Implemented?
Condition/Event Comment
15 Reserved
14
13
12
11
10
9
8
7 NO Even Second Clock Event bit is set each even (2) second
clock tick.
6
5
4
3
2 YES Closed Loop Power Control
Step Size Change Pending
A change was made to the Power Cntl
Step Size field, and a response to the
Power Control Message is pending.
1 YES CDMA Authentication Status
Register SMB
0 YES CDMA SMS Status Register
SMB
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