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IBM 360 User Manual

IBM 360
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IBM Internal Use Only
Input A
-----
O
Input B - O -
+ 1 - -o -
Input C
-----
CD-
Input D
----
O
-9 J-O
AND
L- N
-0-^0
AND
+ 1
----
O-
I N O
The 4 x 1 6 decoder (Figure 23) is designated on the XLF
patch panel as:
DCDR IN 8,4, 2, 1 (four positions)
STROBE (one position)
DCDR OUT 0,1, 2, 3,4, 5, 6, 7, 8, 9,
A, B, C, D, E, F (16 positions)
A and B or Decoder
C and D or
Input
Strobe
A and B
and C
O O
O
and D
1 2
0 O
4 8
Decoder Output
0
0
O O
O
O O
O
0 2 4
6 8 A
C E
0
0
O
O
0 O O O
1
3 5
7 9 B
D
F
Figure 21. Example of DOT OR Function
Figure 23. 4 x 16 Decoder
and by using the not true output from the AND function as
being logically true (Figure 22).
Also, an OR function can serve as an AND function by
inverting the inputs to an OR function through a NOT
function and by inverting the output from an OR function
through a NOT function.
T
-------
o o
Any
O - Channel
Busy
Figure 22. Using Inverted Logic
START/STOP Function
The START and STOP hubs are on the XLF patch panel
(Figure 26).
The START hub, when activated, starts the Basic Counter
Unit counters from an external source. The source may be
an input pulse or patch panel logic. A true signal activates
the START function and turns on the count-enable light.
The START hub is interlocked with PUNCH GO to prevent
data skew while punching out counter contents. If a true is
wired to the START hub, the STOP pushbutton becomes
inoperative.
The STOP hub, when activated, stops the Basic Counter
Unit counters from an external source. The source may be
an input pulse or patch panel logic. A true signal activates
the STOP function and turns off the count-enable light. If
a true is wired to the STOP hub, the START pushbutton
becomes inoperative.
4 x 16 Decoder
A 4 x 16 decoder, on the XLF patch panel, is provided to
decode up to any combination of four true binary inputs
into one of 16 true hexadecimal outputs (Figure 26).
DCDR IN, four hub positions, is wired from a true or not
true source from any of the logical functions on the patch
panel. A true wired to DCDR IN 8,4, 2, or 1 hub defines
the presence of a particular bit; a not true wired to DCDR
IN 8,4, 2, or 1 hub defines the absence of a particular bit.
If DCDR IN 8, 4, 2, or 1 hub is not wired, it is treated by
the decoder as not true.
The STROBE, one hub position, provides a pulse that
controls the decoders output. The STROBE must be wired
from a true signal source. Any combination of four true
inputs to DCDR IN plus a true input to STROBE produces
a true decoder output.
DCDR OUT, 16 hub positions, provides the decoder
output functions. Each position is designated by the
hexadecimal value 0-F. Only one of the DCDR OUT hubs
may be true at any one time. The decoder output remains
true for the duration of the strobe true pulse.
If DCDR IN hubs 2 and 1 are wired from true sources and
if the pulse to the STROBE hub is wired from a true
source, DCDR OUT hub 3 (and only hub 3) is true (active).
See Figure 24.
The decoder can be used to simplify the wiring on the
patch panel to measure CPU active time and CPU wait time
and to apportion these timings to I/O channels.
The four signal sources and inputs to DCDR IN are:
Signal Sources DCDR IN
Selector Channel 2 8
Selector Channel 1 4
Multiplexer Channel 2
Wait 1
True is wired to STROBE
Manual is wired to STOP
Not Manual is wired to START
The decoder provides all possible combinations of CPU,
wait, channel, and CPU/channel overlap. The Karnaugh
map (Figure 25) illustrates the available combinations of
CPU, wait, and channel(s) for a three-channel system. The
desired DCDR OUT hubs may be wired to counter timing
or counting hubs depending on the user’s specific applica
tion.
SEL I - - O jNbtj o 0 - - (
SEL II - -
MPX - -
Not
AND
N
Not
Operating the IBM Basic Counter Unit 15

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IBM 360 Specifications

General IconGeneral
BrandIBM
Model360
CategoryNetwork Hardware
LanguageEnglish

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