Icom IC-7800 - Page 385

4 - 12
RXPLL-B UNIT ADJUSTMENTS–Continued
HPL LOCK
VOLTAGE
(VCO6)
S1 LO
OUTPUT
2LO LOCK
VOLTAGE
2LO
OUTPUT
RX
SENSITIVITY
(HF)
IMAGE
RESPONSE
ADJUSTMENT
ADJUSTMENT ADJUSTMENT CONDITION
MEASUREMENT
VALUE
POINT
UNIT LOCATION UNIT ADJUST
12
1
1
1
1
2
1
• SUB display frequency
: 45.000 MHz
• Mode : USB
• Receiving
• SUB display frequency
: 14.999 MHz
• Mode : USB
• Receiving
• SUB display frequency
: 14.100 MHz
• Mode : USB
• Receiving
• MAIN display frequency
: 14.100 MHz
• Mode : USB
• Receiving
Pre-set the IC-7800 as the following
condition.
• SUB display frequency
: 14.150 MHz
• Mode : USB
• Dualwatch : ON
• MAIN Ant. : ANT2
• SUB Ant. : ANT1
• Pre-amp. 1 : ON
• MAIN AF : Minimum level
• Receiving
• SUB display frequency
: 14.150 MHz
• Mode : USB
• Connect an SSG to [ANT1] connec-
tor and set as;
Frequency : 14.1515 MHz
Level : 1 µV* (–107 dBm)
Modulation: OFF
• Receiving
• SUB display frequency
: 14.150 MHz
• Mode : USB
• Connect an SSG to [ANT1] connec-
tor and set as;
Frequency : 14.0765 MHz
Level : 50 mV* (–13 dBm)
Modulation: OFF
• Receiving
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
Rear
panel
Rear
panel
Connect a DC volt-
meter to CP2 (LV2).
Connect an RF volt-
meter to J351 (S1LO).
Connect a DC volt-
meter to CP3.
Connect a spectrum
analyzer to J561 (2LO).
Connect a DC volt-
meter to CP1102.
Connect a DC volt-
meter to CP1103.
Per-set L1401, L1402,
L1403, L1404, L1405
and L1406 as the illus-
tration at right.
Connect an AC milli-
volt meter to [EXT SP]
jack with 8 Ω load.
Connect an AC milli-
volt meter to [EXT SP]
jack with 8 Ω load.
1.2 V–2.0 V
2.25 dBm ±0.25 dB
3.0 V ±0.3 V
Maximum level
(–9.0 dBm ±3.0 dB)
4.5 V ±0.1 V
4.5 V ±0.1 V
Center
position
Maximum audio level
Minimum audio level
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
RX
PLL-B
Verify
R357
C546
Adjust
repeatedly
L565,
L566
R1101
R1132
R1228
L1401,
L1402
L1403,
L1404
L1410,
L1411
L1408,
L1058
R1516,
C1656
*This output level of a standard signal generator (SSG) is indicated as SSG’s open circuit.
Core
2 rotations
Core
3.5 rotations
Core’s top