Product Description
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1.12.2.2 Fan Headers
The function/operation of the fan headers is as follows:
• The fans are on when the board is in the S0 state.
• The fans are off when the board is off or in the S3, S4, or S5 state.
• The processor fan header is wired to a fan tachometer input. The front and rear fan
headers each have independent tachometer input to the hardware monitoring and
fan control device. All fan headers support closed-loop fan control that can adjust
the fan speed according to thermal conditions.
• All fan headers have a +12 V DC connection.
For information about Refer to
The locations of the fan headers and thermal sensors Figure 6, page 32
The signal names of the processor fan header Table 19, page 49
The signal names of the chassis fan headers Table 18, page 49
1.12.2.3 LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line from the power supply must be
capable of providing adequate +5 V standby current. Failure to provide adequate
standby current when implementing LAN wake capabilities can damage the power
supply.
LAN wake capabilities enable remote wake-up of the computer through a network.
The LAN subsystem PCI bus network adapter monitors network traffic at the Media
Independent Interface. Upon detecting a Magic Packet* frame, the LAN subsystem
asserts a wake-up signal that powers up the computer. Depending on the LAN
implementation, the board supports LAN wake capabilities with ACPI in the following
ways:
• The PCI Express WAKE# signal
• The PCI bus PME# signal for PCI 2.3 compliant LAN designs
⎯ By Ping
⎯ Magic Packet
• The onboard LAN subsystem
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