LTC2983
9
2983fc
For more information www.linear.com/LTC2983
PIN FUNCTIONS
GND (Pins 1, 3, 5, 7, 9, 12, 15, 44): Ground. Connect
each of these pins to a common ground plane through a
low impedance connection. All eight pins must be grounded
for proper operation.
V
DD
(Pins 2, 4, 6, 8, 45): Analog Power Supply. Tie all
five pins together and bypass as close as possible to the
device, to ground with a 0.1μF capacitor.
V
REF_BYP
( Pin 11): Internal Reference Power. This is an
internal supply pin, do not load this pin with external
circuitry. Decouple with a 0.1µF capacitor to GND.
V
REFOUT
(Pin 13): Reference Output Voltage. Short to
V
REFP
. A minimum 1μF capacitor to ground is required.
Do not load this pin with external circuitry.
V
REFP
(Pin 14): Positive Reference Input. Tie to V
REFOUT
.
CH1 to CH20 (Pin 16 to Pin 35): Analog Inputs. May be
programmed for single-ended, differential, or ratiometric
operation. The voltage on these pins can have any value
between GND – 50mV and V
DD
– 0.3V. Unused pins can
be grounded or left floating.
COM (Pin 36): Analog Input. The common negative input
for all single-ended configurations. The voltage on this
pin can have any value between GND – 50mV and V
DD
–
0.3V. This pin is typically tied to ground for temperature
measurements.
INTERRUPT (Pin 37): This pin outputs a LOW when the
device is busy either during start-up or while a conversion
cycle is in progress. This pin goes HIGH at the conclusion
of the start-up state or conversion cycle.
SCK (Pin 38): Serial Clock Pin. Data is shifted out of the
device on the falling edge of SCK and latched by the device
on the rising edge.
SDO (Pin 39): Serial Data Out. During the data output state,
this pin is used as the serial data output. When the chip
select pin is HIGH, the SDO pin is in a high impedance state.
SDI (Pin 40): Serial Data Input. Used to program the device.
Data is latched on the rising edge of SCK.
CS (Pin 41): Active Low Chip Select. A low on this pin
enables the digital input/output. A HIGH on this pin
places SDO in a high impedance state. A falling edge on
CS marks the beginning of a SPI transaction and a rising
edge marks the end.
RESET (Pin 42): Active Low Reset. While this pin is LOW,
the device is forced into the reset state. Once this pin is
returned HIGH, the device initiates its start-up sequence.
LDO (Pin 43): 2.5V LDO Output. Bypass with a 10µF
capacitor to GND. This is an internal supply pin, do not
load this pin with external circuitry.
Q3, Q2, Q1 (Pins 46, 47, 48):
External Bypass Pins for
–200mV integrated Charge Pump. Tie a 10µF X7R capaci-
tor between Q1 and Q2 close to each pin. Tie a 10µF X5R
capacitor from Q3 to Ground. These are internal supply
pins, do not make additional connections.
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