EasyManua.ls Logo

Marantz SR4500 - NJU3430 FG1 IC Data

Marantz SR4500
84 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
43 44
IC81 : NJU3430FG1
66 P60/_DREQ0 I/O NJW1157DATA
-
O
-
L NJW1157/
CS42418
Data
Input
67 VSS I VSS
---
GND
68 VSS I VSS
---
GND
69 P61/_TEND0 I/O NJW1157CLK
-
O
-
LN
JW1157/CS42418 Clock Input
70 P62/_DREQ1 I/O NJW1157LATCH
-
O
-
L NJW1157 Latch Input
71 P63/_TEND1 I/O N.C.
-
OLLOpen
72
P27/PO7/TIOCB5/
TMO1
I/O FLRA_ON
-
O H L Front Speaker On/Off
73
P26/PO6/TIOCA5/
TMO0
I/O N.C.
-
O
-
L Open
74
P25/PO5/TIOCB4/
TMCI1
I/O SURR_ON
-
O H L SURR/CNT Speaker On/Off
75
P24/PO4/TIOCA4/
TMRI1
I/O AVSS
-
O H L Power Amp±B_L_Sel
76
P23/PO3/TIOCD3/
TMCI0
I/O _HEAT_DET
-
IH
-
Power Amp Heat sink
Tem
pDetect
77
P22/PO2/TIOCC3/
TMRI0
I/O _STANDBY
-
O L L Standby Power
78 P21/PO1/TIOCB3 I/O _HP_DET
-
IL
-
HP Jack Detect
79 P20/PO0/TIOCA3 I/O HP_ON
-
O H L Head Phone On
80 VCL I VCL
----
81 _RES I _RST
-
L
-
Reset
82 NMI I NMI
---
Fix H(At the time of the
un-use)
83 _STBY I _STBY
-
LHFixH
84 VCC I Vcc
---
+5V
85 XTAL I XTAL
---
Xtal(20M)
86 EXTAL I EXTAL
---
Xtal(20M)
87 VSS I VSS
-
-
-
-
-
-
-
---
GND
88 PF7/<B I/O SEL-
-
I
--
Front Select. Encoder
89 VCC I Vcc
----
+5V
90 PF6 I/O SEL+
-
I
-
Front Select. Encoder
91 PF5 I/O _STBY LED L O L H Standby LED On
92 PF4 I/O _RSFL
-
O L L Front FL Driver
93 PF3 I/O VOL-
-
I
-
Front Vol. Encoder
94 PF2 I/O VOL+
-
I
-
Front Vol. Encoder
95 PF1 I/O CTS
-
I
-
-
-
-
-
UART
96 PF0 I/O RTS H O H
-
UART
97 P50/TxD2/_IRQ4 I/O OSDDATA
-
O
-
L NJU3430 Data In
put
98 P51/RxD2/_IRQ5 I N.C
-
I
--
Pull Down 10k
99 VSS I VSS
---
GND
100 VSS I VSS
-
-
---
GND
101 P52/SCK2/_IRQ6 I/O OSDCLK
-
O
-
L NJU3430 Clock In
put
102
P53/_ADTRG/
_IRQ7
I/O _RSTFL
-
O L L Reset FL Driver
103 AVCC I AVCC
---
+5V
104 Vref I VREF
-
-
---
+5V
105 P40/AN0 I KEY0
-
AD
-
Front Key
106 P41/AN1 I KEYBÒ
-
AD
-
Front Key
107 P42/AN2 I KEY2
-
AD
-
Front Key
108 P43/AN3 I N.C.
-
I
-
Pull Up 47k
109 P44/AN4 I P_LINE_FAIL
-
AD
-
Emergency Protection
110 P45/AN5 I MODE
-
AD
-
CPU mode
111 P46/AN6/DA0 I N.C.
-
I
-
Open
112 P47/AN7/DA1 I N.C.
-
AD
-
-
-
-
-
-
-
-
-
Pull Down 47k
113 AVSS I VSS
----
GND
65 VSS I VSS
-
-
-
---
GND
114 VSS I VSS
----
GND
115
P17/PO15/TIOCB2/
TCLKD
I/O SB_ON
-
O H L Surroud Back On: H / Off: L
116
P16/PO14/
TIOCA2
I/O RC_OUT
-
O
-
L RC BUS Output
117
P15/PO13/TIOCB1/
TCLKC
I/O N.C.
-
O
--
Pull Up 47k
118
P14/PO12/
TIOCA1
I/O N.C.
-
O
-
L Open
119
P13/PO11/TIOCD0/
TCLKB
I/O KILLIR L O H L Kill to IR input signal.
120
P12/PO10/TIOCC0/
TCLKA
I/O N.C.
-
O
-
L Open
121
P11/PO9/TIOCB0/
_DACK1
I/O N.C.
-
O
-
L Open
122
P10/PO8/TIOCA0/
_DACK0
I/O RC_IN
-
T_IN
↑↓   
-
IR In for RC-5
123 MD0 I MD0
-
YES
-
+5VL
124 MD1 I MD1
-
YES
-
Fix H
125 MD2 I MD2
-
YES
-
-
-
-
Normal :H, Boot :L
126 PG0 I/O _FCS
-
OLHDSPChi
p Enable
127 PG1 I/O _RSTDSP
-
OLLDSPReset
128 PG2 I/O _SCS
-
O L H DSP Chip Enable
pin port I/O Name STBY Note
mode = 7 set use Act. init
Port Setting
SI
CS
CLK
RS
V
SS
OSC
1
OSC
2
V
DD
RST
V
FDP
MK
1
~
MK
2
S
1
~
S
35
P
1
T
1
~
T
16
8bits
Shift
Reg.
Instruction
Decoder
Timing
Gen.
CR
OSC.
State
Reg.
Display
Control
Address
Selector
Read
Address
Counter
Line
Address
Counter
Timing
Driver
DD RAM
16x8bit
CG ROM
8,400bit
Port
Driver
CG RAM
35x8bit
Segment
Driver
MK RAM
16x2bit
Icon
Driver
RESET
No. SYMBOL I/O F U N C T I O N
57 V
DD
- Power Source : V
DD
=+3.0 to 5.5V
49 V
SS
- GND : V
SS
=0V
48 V
FDP
-
VFD Driving Power Sourse
V
DD
-20V to V
DD
-45V
50 OSC
1
I
CR Oscillation Terminal
External R and C connect to these terminals.
(Target f
OSC
=360kHz)
51 OSC
2
O
54 CLK I
Serial Clock Input Terminal
The serial data input synchronizing the rise edge of this
terminal.
53 CS I
Chip Select Terminal
When the CS terminal is "H" the serial data input is not
available.
55 SI I
Serial Data Input Terminal
The data input is MSB first.
56 RS I
Register Selection Signal Input Terminal
RS="0" : Instruction Register
RS="1" : Data Register
52 RST I
Reset Terminal RST="L" : Reset
-Each Address
-Each RAM Data
-Display Digits
-Contrast Control
-All Display Off
-All Outputs are "L"
: (00)
H
: Unfixed
: 16-digit
: 8/16 Dury
61 to 64,
1 to 31
S
1
to S
35
O
Segment Output Terminals (Internal Pull-down
Resistance)
32 to 47 T
1
to T
16
O Timing Output Terminals (Internal Pull-down Resistance)
60
59
MK
1
MK
2
O Icon Output Terminals (Internal Pull-down Resistance)
58 P
1
O
Output Port Terminal
This terminal is suitable for LED.
IC41 : H8S2398

Other manuals for Marantz SR4500

Related product manuals