Mitsubishi Q12PRHCPU - Page 395

APPENDICES
Appendix 6 Precautions for Using Serial Communication Module
Appendix 6.1 CSET Instruction
App - 34
9
PROCESSING TIME FOR REDUNDANT SYSTEMS
APPENDICESINDEX
(c) Specification of head address/area size of send area/receive area
The following shows the device and buffer memory used in the sample program of
specifying the head address and area size.
1) I/O signal
2) Buffer memory
POINT
When using the following functions simultaneously, be careful not to duplicate the
assignment of buffer memory which stores send data and receive data dealt with
the function to be used.
• On-demand function of MC protocol
• Send/receive function of nonprocedural protocol
• Send/receive function of bidirectional protocol
Table.App 16 List of I/O Signal
I/O signal
Signal name Description
CH1 side CH2 side
X(n+1)E Q series C24 ready ON: Accessible
X(n+1)F
Watchdog timer error
(WDT error)
ON : Module error occurred
OFF: Module being normally
operated
Table.App 17 List of Buffer Memory
Buffer memory address Hexadecimal (decimal)
Buffer memory name
CH1 side CH2 side
A2
H
(162) 142
H
(322)
Transmission buffer memory head
address designation
A3
H
(163) 143
H
(323)
Transmission buffer memory length
designation
A6
H
(166) 146
H
(326)
Receive buffer memory head address
designation
A7
H
(167) 147
H
(327)
Receive buffer memory length
designation