Transceiver 800MHz (PCB No. 8486079Z02_A): SCHEMATICS, PCBs and PARTS LISTS MTM700 Mobile Radio / Detailed Service Manual 8.2.2 - 19
HDI_Controller 8466520A02_A (Sheet 1)
LAYER 1
TIMER
CLOCK
AND PLL
UART-A
UART-B
KEYPAD
BASEBAND
CODEC PORT
INTERRUPTS
EMU AND
DEBUG
EIM
TP 0112
1
6
JTAG AND TEST
SMART CARD
TP 0115
AUDIO
CODEC
DSP I-A
DSP I-B
TX_DETECT(SLUMP DETECT)
FR_GND
EB1
#
The only way this makes sense is if you think of the data flow with respect to the radio
as a whole and NOT as a ABACUS/ADDAG to DSP serial interface.
ROW7
ROW6
TX
RI
STDA TRST
Unused GPO
TMS
JTAG
RESET_IN
32.768 kHz Input
MCU_DE
EXP_UART_2
RESET_OUT
DCD
OE
ABACUS Frame SYNC
TX
NU
SAP
BBP
RX
INTERRUPT
RESET_OUTRESET_OUT
32.768 kHz Input
CTS
SCKA
SC2A
STDA
KEY_FAIL_OUT
NU
EXT_VPP
Gen Port Ctrl Reg (GPCR)
INT7
a "Transmit Data Register" and has an STD Pin name. The Register used to
SC2A
DSP_STD goes to CODEC/UCM/DGAN_Module
17x17mm BGA
GPCR (Bit7)=0
SRDA
4-Wire RS232
GPCR = xxxxxxxx x00xxx00
GPCR (Bit7)=1
RESET_ABACUS
KEY_FAIL_IN
ADDAG Frame SYNC
INT5 - Option_Select_2
EXP_REQ (UART)
RTSRTS
RESET Low_Voltage_Detector
MUX_CTRL=0
Unused GPO
Unused GPO
LAYER1 TIMER
NOTE: The register used to receive data (from the DSP) in the ADDAG is called
ABACUS
SPIB
STD Send Transmit I/Q Data to ADDAG
INT0 - PTT
WR
_
SRDA
FR_GND
INT5 - Option_Select_2
FLASH
SRAM
RADIO SOFT TURN OFF
NU
TX
2 Meg 6x1
SYMBOL
ESSI
FLASH
INT1 - EXP_REQ
INPUTS
SIM_CARD
RTS
CTS CTS
INT6
SPARE
ADDAG Serial Port Clock for Transmit Data
MOD
SBEP
REDCAP2
16.8 MHz Clock Output
16.8 MHz Input
Option_Select_2
RX
Unused GPO
PIN NAME
transmit data to the DSP is called the "Receive Data Register" and has an SRD Pin Name.
ESSI
SAP_TDMA Support for Digianswer Modul e
RX
TCK
Internal Pulldown
DSP_DE
CS2#-SRAM
MUX_CTRL =1 AND THE 8-WIRE INTERFACE IS THUS SET TO JTAG MODE
Unused GPO
SB9600
RESET_OUT
Serial Audio Port Frame Sync CODEC Suppor t
SRD Receive I/Q Data from ABACUS
EB0#
ADDAC
ODCT
BUSY_IN (IC2)
INT4 - Option_Select_1
TDI
GPCR = xxxxxxxx x11xxx11
RX
Gen Port Ctrl Reg (GPCR)
TDO
EXT- PTT
SCKA
PTT
Option_Select_1
SPIA
TX
I/O
AUDIO_IN
SAP_TDMA Support for UCM
ESCORT
BUSY_OU
T
DSR
DTR
8-Wire RS232
DNP
RS232 ENABLE
NOTE: RESETS FROM THE BOTTOM CONNECTOR WILL ONLY BE POSSIBLE IF
Serial Audio Port Clock
DSP_SRD goes to CODEC/UCM/DGAN_Module
NU
EXP_UART
INT2 - ON_OFF_CONTROL CH
LVFRACN+PCIC
DNP
16.8 MHz Input
INT4 - Option_Select_1
Unused GPO
DNP
ABACUS Serial Port Clock for Receive Data
MUX_CTRL=1
NU
BGA140
0
R010
8
16
F5
VCCQ
E1
VPP
A4
D7
EN_OE
F8
EN_RP
B4
EN_WE
B3
A5
EN_WP
GND1
E8
GND2
F1
NC1
C4
VCC
D5
DQ3
E5
DQ4
F4
D3
DQ5
DQ6
E3
DQ7
F2
DQ8
D6
DQ9
E6
EN_CE
E7
DQ1
F7
DQ10
F6
DQ11
D4
DQ12
E4
DQ13
F3
DQ14
D2
DQ15
E2
DQ2
A20
A3
C7
A4
A8
A5
B7
A6
C6
A7
A7
A8
A3
A9
C3
DQ0
A14
B1
A15
C1
A16
D1
A17
B6
A18
B5
A19
A6
A2
B8
C5
A0
D8
A1
C8
A10
B2
A11
A2
A12
C2
A13
A1
U0102
28F320C3
BGA118
15
BGA144
15
BGA143
BGA107
BGA150
6
14
BGA68
BGA112
BGA70
BGA106
BGA122
BGA121
BGA127
BGA147
13
4
BGA130
BGA75
BGA109
BGA110
BGA111
BGA153
8
BGA57
BGA135
BGA3
8
9
10
11
5
BGA108
BGA119
BGA77
5
BGA78
BGA82
BGA83
BGA84
4
BGA85
BGA71
BGA9
BGA93
BGA94
BGA45
BGA46
BGA47
BGA42
BGA41
11
BGA124
9
10
BGA156
5
BGA21
6
BGA20
BGA33
BGA16
BGA15
BGA14
BGA13
BGA95
BGA4
BGA3
BGA2
BGA134
BGA132
BGA133
11
9
BGA73
BGA74
4
6
BGA23
BGA79
3
BGA81
BGA58
BGA59
BGA60
11
BGA61
8
7
10
BGA48
BGA49
BGA50
0
NU
R0101
1
R0102
0
BGA30
BGA29
6
15
1
BGA19
BGA17
11
4
BGA91
BGA88
BGA89
0
11
2
1
12
2
13
7
8
6
BGA1
BGA80
20
20
B4
5
E0100
XYD4
T8
XYD5
N8
XYD6
M6
XYD7
XYD8
L10
XYD9
M9
XZYRW
C4
XYSEL
B5
XYST
M10
XYD11
M11
XYD12
N9
XYD13
T9
XYD14
R9
P9
XYD15
M5
XYD2
P8
XYD3
R8
A3
XYA5
A2
XYA6
A1
XYA7
C2
C3
XYA8
D1
XYA9
R7
XYD0
T7
XYD1
XYD10
XYA10
D3
XYA11
E2
XYA12
E1
XYA13
E3
XYA14
XYA15
E4
XYA2
B3
XYA3
B2
XYA4
TOUT7
TOUT8
C7
TOUT9
B7
H1 4
TRST
G15
TXA_TDO
TXB
K11
XYA0
A4
XYA1
D4
D2
E6
TOUT14
E7
TOUT15
E8
D5
TOUT2
C6
TOUT3
B6
TOUT4
A6
TOUT5
D6
TOUT6
D7
TDO
G16
TEST
H12
TMS
A5
TOUT0
C5
TOUT1
TOUT10
B8
TOUT11
A8
TOUT12
D8
TOUT13
SRDA
B14
SRDB
SRDB2
B12
D16
STDA
A14
STDB
T13
STO
H13
TCK
G12
TDI
F1
2
SPICS2A
SPICS2B
B10
E9
SPICS3A
SPICS3B
A10
F7
SPICS4A
SPICS4B
E12
A9
SPI_CKA
SPI_CKB
D11
D13
SIMDATA
T12
SIMRESET
F15
SIZ0
F14
SIZ1
D9
SPICS0A
SPICS0B
D10
E11
SPICS1A
SPICS1B
C10
E10
SC1B
A15
SC2A
C14
SC2B
C15
SCKA
C13
SCKB
SCKB2
A12
P12
SENSE
N11
SIMCLK
N12
RTSA_IC2A_RESET_IN
RTSB
K12
RW
G14
RXA_IC1_TDI
RXB
J12
B16
SC0A
B13
SC0B
A16
SC1A
A13
ROW0
K13
ROW1
K14
ROW2
K15
ROW3
J14
ROW4
J15
ROW5_IC2B
J16
ROW6_DCD_SC2A_DSP_DE
J13
ROW7_RI_SCKA_TCK
G13
PSTAT0
E15
PSTAT1
D14
PSTAT2
D15
PSTAT3
T10
PVCC
T11
PWR_EN
R13
RESET_IN
P13
RESET_OUT
L15
MOD
C9
MOSIA
MOSIB
D12
F16
MUX_CTL
OE
N10
P1GND
R10
PCAP
P10
PGND
E13
INT3
M16
INT4
M14
INT5
M13
INT6_DSR_STDA_TRST
L14
INT7_DTR_SCLK_SRDA_TMS
H1 1
MCU_DE
B9
MISOA
MISOB
C11
D9
G1
1
DSP_DE
C12
DSP_IRQ
EB0
EB1
N16
INT0
N15
INT1
N14
INT2
M15
D15
T3
D2
R3
D3
P3
D4
T4
D5
R4
D6
P4
D7
P5
D8
N5
L12
T1
D0
T2
D1
P6
D10
R6
D11
T6
D12
N6
D13
N7
D14
P7
COLUMN7
CS0
CS1
CS2
CS3
CS4
M2
M1
R12
K1
J3
N3
N2
P2
R2
P1
R1
CS5
F13
CTSA_MCU_DE
CTSB
CKOH
N13
COLUMN0
R14
COLUMN1
R15
COLUMN2
T14
COLUMN3
R16
COLUMN4
P16
COLUMN5
P15
COLUMN6_OC1
P14
ADDR5
H6
ADDR6
G6
ADDR7
H5
ADDR8
G5
ADDR9
K4
CKIH
K2
CKIL
M3
CKO
L2
ADDR17
F4
ADDR18
F1
ADDR19
J4
ADDR2
F2
ADDR20
F3
ADDR21
L5
ADDR3
K6
ADDR4
J6
ADDR1
F5
ADDR10
H4
ADDR11
H1
ADDR12
H2
ADDR13
H3
ADDR14
E5
ADDR15
G3
ADDR16
G4
U0100-1
J2
ADDR0
J1
3
19
1
22K
R0103
9
0
V3_2.775V_FLTR
7
8
9
12
7
8
C0104
.01uF
19
C0100
.01uF
12
BGA18
1
V3_2.775V
3
12
3
3
15
13
7
18
17
9
17
7
4
0
12
10
4
14
14
0.1uF
C0101
5
R0121
22K
5
18
5
14
C0105
4700pF
BGA12
3
BGA11
32
3
BGA5
BGA113
C0102
0.1uF
BGA56
18
BGA24
BGA64
BGA65
6
BGA66
21
1
5
10
BGA117
13
PWM2_1.8V_FLTR
5
2
13
6
16
3
4
2
V3_2.775V_FLTR
4
BGA6
1
2
BGA72
1
2
BGA10
3
14
BGA63
BGA34
BGA149
BGA25
BGA2
6
BGA27
BGA115
BGA90
BGA67
BGA114
BGA6
9
BGA7
6
1
16
2
C0106
4.7uF
BGA87
BGA3
7
13
15
8
4
17
3
4
BGA8
12
10
BGA7
R0122
1K
BGA116
BGA9
2
BGA6
2
BGA5
5
21
BGA5
4
V3_2.775V_FLTR
BGA125
BGA2
8
BGA3
1
BGA4
0
2
2
BGA3
9
BGA3
6
BGA35
0
15
14
19
BGA128
BGA129
BGA154
BGA131
BGA137
BGA146
BGA126
BGA142
BGA141
1
BGA145
BGA44
BGA43
BGA138
BGA52
BGA51
BGA53
BGA22
4
R0104
47
BGA86
BGA32
5
C0103
.01uF
MEM_CNTL(6:1)
HST_Addr(0:21)
EB0
EB1
CS2
_
EEPOT_CS
SPARE3
EEPOT_TGL
SENSE
EEPOT_U_D
RESET_OUT
MOD
RS232_DTR
TX_DETECT
SOFT_TURN_OFF
SAP_STD
UCM_SAP_FSYNC
DGAN_SAP_FSYNC
AUDIO_ATTN_CTRL
PVCC
SPARE2
RS232_DSR
GP8_OUT_ACC14
RSB_RX
SIM_POWER
SIM_RESET
SIM_CLOCK
ON_OFF_CONTROL
GP6_IN_ACC12
SPIA_MOSI
SPIA_CLK
SPIA_CS0_ADD
SPIA_CS2_ODCT
SPIA_CS3_ESC
SPIA_CS4_ABA
SPIB_MOSI
SPIB_CLK
SPIB_CS1_UART
SPIB_CS2
HST_DATA(0:15)
RS232_RX
RS232_CTS
TOUT_15
LO_Driver_En
PWM
RSB_CTS
MUX_CTRLC
AUD_PA_EN
Lock_FN
RSB_RTS
ADD_FSYNC
SSI_CLKOUT
MUX_CTRLA
MUX_CTRLB
SRDB2
STO
AGC_2_IF
BAT_V_HIGHG
GP9_IN_ACC15
GP9_OUT_ACC15
SPARE1
GP8_IN_ACC14
ADD_TXE
16.8MHz_OUT
SSI_SYNCB
RESET_ODCT_ADD
LV_DETECT
SAP_FSYNC
SIM_DATA
SSI_DOUT
TEMP_SENSE
TOUT8
SPIB_MISO
SPIA_CS1_FN_PCIC
SIM_BUS(5:1)
RSB_TX
AGC_0_FE
TOUT_11
TOUT_13
AUDIO_SENSE
GP6_OUT_ACC12
EXP_REQ
OPT_SEL_1
OPT_SEL_2
MUX_CTRL
RS232_DCD
RS232_RI
RS232_RTS
SSI_FSYNC
SAP_CLK ADD_TXCLK
SAP_SRD
ADD_STD
AGC_1_FE
PA_BIAS
PCIC_AD_SWTCH
ANT_EN
LO2_OUT
RS232_TX
REF16.8_FN
GP2_OUT_ACC4
GP3_OUT_ACC6
GP3_IN_ACC6
GP4_IN_ACC9
GP5_IN_ACC10
SPIA_MISO
32KHz_CLK
GP1_IN_ACC3
USE ONLY WITH NEXT GENRATION PATRIOT
TP0134
TP0135
TP0101
TP0133
TP0132
TP0130
TP0131
USB_CTRL_SIGNALS
TP0122
TP0120
TP0121
TP0119
TP0118
TP0124
TP0123
TP0117
TP0116
TP0114
TP0113
D1
VSS1
E6
VSS2
E3
VSS3
A2
EN_WE
G5
A1
LB
G2
NC1
H6
NC2
B2
UB
E1
VCC1
D6
VCC2
D5
D3
E5
D4
F5
D5
F6
D6
D7
G6
B1
D8
C1
D9
B6
DO
C5
D1
D10
C2
D2
D11
E2
D12
F2
D13
F1
D14
G1
D15
C6
D2
B4
A4
C3
A5
C4
A6
D4
A7
A8
H2
H3
A9
B5
CS1
A6
CS2
G4
F3
F4
E4
D3
H1
A5
A2
B3
A3
K6F8016U6A
U0101
A3
A0
A1
A4
H4
H5
G3
EN_OE
A13
A14
A15
A16
A17
A18
A10
A11
A12
NC
NC
(Note: U0100-2 on next page)
ZWG0130877-A
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