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Hardware Preparation and Installation
1
.
Notes As shown in the preceding table, the Petra/MC2 interface
supports parity DRAM emulations up to 16MB. For sizes
beyond 16MB, it is necesary to use the MCECC memory
model.
For access to the MCECC registers, you must first disable the
MC2 interface by setting S3 to 001 (Off/Off/On). Further details
on selecting the MCECC emulation can be found under MCECC
DRAM Size (S6).
If you modify the switch settings, you will need to execute env;d
<CR> so that the firmware recognizes the new memory defaults.
Table 1-3. MC2 DRAM Size Settings
S3
Segment 1
S3
Segment 2
S3
Segment 3
MC2 DRAM
Size
ON ON ON 1MB
OFF ON ON 4MB
OFF ON OFF 8MB
OFF OFF ON Disabled
OFF OFF OFF 16MB
2734 0004
ON OFF
16MB
(factory configuration)
4
1
MC2 DRAM SIZE
S3