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4.5 Advanced Chipset Features
DRAM Timing Selectable
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to [By SPD] enables the following fields auto-
matically to be determined by BIOS based on the configurations on the SPD. Selecting
[Disabled] allows users to configure these fields manually.
**VGA Setting**
The following items allow you to configure the settings about VGA.
On-Chip Frame Buffer Size
The field specifies the size of system memory allocated for video memory. Settings:
[1MB], [8MB].
MSI Reminds You...
Change these settings only if you are familiar with the chipset.
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