NXP Semiconductors MPC5746R - Page 39

ADC and Analog
MPC5746R Hardware Design Guide, Rev. 1
NXP Semiconductors 39
Figure 26 shows an example of differential SDADC channels with filtering components. Inputs need to be
180 degrees out of phase and in the 10 Hz - 100 kHz range.
Figure 26. Differential channel SDADC external circuitry example, R=8 kΩ C=250 pF
NOTE
The external common mode voltage of the differential signals should be
VDD_HV_ADR_SD/2. Depending on the system noise levels, the user can
install C
CM_P
/ C
CM_N
to improve the external common mode noise. As a
rule of thumb, the capacitor value should be less than or equal to the filter
capacitor C/10.
The guidelines that need to be followed when designing the external circuitry for the MPC5746R SDADC
differential channels
• The internal common-mode voltage for the MPC5746R SD is VDD_HV_ADR/2 and is set by the
bias generator.
• External C
CM_P
/C
CM_N
capacitors filter external common-mode noise.
• External C
CM_P
/C
CM_N
have 2
nd
order effect on the filter pole. Without external common-mode
filter caps, user have to rely on common-mode noise rejection of the ADC.
• External C
CM_P
/C
CM_N
should be 1/10
th
or less than the value of C filter.
• External C
CM_P
/C
CM_N
is ideally connected to V
CM
(VDD_HV_ADR/2), but can be connected to
ground (VSSA).
R/2
SD_AN[1]
C
R/2
SD_AN[0]
MPC574xR
Vin+
Vin-
C
CM_N
C
CM_P