NXP Semiconductors MPC5748G - Page 33

5
4
3
2
1
GPIO Pin Matrix
All pads are DNP (Do Not Populate) 0.1" pitch headers placed on a 0.1" grid
7
PA0
PA0
PA1
PA[1,2] shared with
7,14
PA1
PORTA
PORTB
PORTD
PortF
PortI
PA2
7,14
PA2
user switches
7
PA4
PA4
D
7
PA5
PA5
1
1
1
1
PA6
PA0
PD0
PF0
PI0
7
PA6
PA12
IOM1
IOM5
IOM10
IOM15
7
PA12
1
1
1
1
PA13
PA1
PD1
PF1
PI1
7
PA13
PA14
IOM2
IOM6
IOM11
IOM16
7
PA14
1
1
1
1
PA15
PA2
PD2
PF2
PI2
7
PA15
IOM3
IOM7
IOM12
IOM17
1
1
1
7
PB5
PB5
PD3
PF3
PI3
PB6
IOM8
IOM13
IOM18
7
PB6
1
1
1
PB7
PA4
PD4
PF4
7
PB7
PB10
IOM4
IOM9
IOM14
7
PB10
1
1
1
1
PB11
PA5
PB5
PD5
PF5
7
PB11
PB12
IOM19
IOM21
IOM24
IOM29
7
PB12
1
1
1
1
1
PB13
PA6
PB6
PD6
PF6
PI6
7
PB13
PB14
IOM20
IOM22
IOM25
IOM30
IOM34
7
PB14
1
1
1
PB15
PB7
PD7
PF7
7
PB15
IOM23
IOM26
IOM31
1
1
1
7,14
PD0
PD0
PD8
PF8
PI8
PD1
IOM27
IOM32
IOM35
7,14
PD1
1
1
PD2
PD9
PF9
7,14
PD2
PD3
IOM28
IOM33
PD[0..3] shared with
7,14
PD3
1
1
1
PD4
PB10
PD10
PF10
7
PD4
Hex Switch
7
PD5
PD5
IOM39
1
IOM44
IOM48
1
PD6
PB11
PF11
7
PD6
PD7
IOM40
IOM49
C
7
PD7
1
1
1
1
1
PD8
PA12
PB12
PD12
PF12
PI12
7
PD8
PD9
IOM36
IOM41
IOM45
IOM50
IOM52
7
PD9
1
1
1
1
1
PD10
PA13
PB13
PD13
PF13
PI13
7
PD10
PD12
IOM37
IOM42
IOM46
IOM51
IOM53
7
PD12
1
1
1
1
PD13
PA14
PB14
PD14
PI14
7
PD13
PD14
IOM38
IOM43
IOM47
IOM54
7
PD14
1
1
1
1
PD15
PA15
PB15
PD15
PI15
7
PD15
IOM55
IOM56
IOM57
IOM58
PF0
7
PF0
PF1
7
PF1
PF2
7
PF2
PF3
7
PF3
TPH4
TPH5
TPH6
TPH7
TPH8
PF4
7
PF4
PF5
7
PF5
PF6
7
PF6
PF7
7
PF7
1
1
1
1
1
PF8
7
PF8
PF9
7
PF9
PF10
7
PF10
PF11
7
PF11
5 GND Pads (one at bottom of each colum)
PF12
GND
7
PF12
PF13
7
PF13
B
8
PI0
PI0
Layout Notes:
PI1
8
PI1
8
PI2
PI2
Pads must be placed in a 5 (W) x 16(H) matrix pattern, 2.54 mm pitch
PI3
8
PI3
PI6
- one column for each port
8
PI6
PI8
- 16 tall (1 row for each port number from 0 to 15).
8
PI8
8
PI12
PI12
- GND pad at bottom of each colum
PI13
8
PI13
- After production, pads should be through hole (not solder filled)
PI14
8
PI14
PI15
8
PI15
Automotive Microcontroller
Applications
A
East Kilbride, Scotland
NXP General Business Use
Drawing Title:
MPC5748G-LCEVB
Page Title:
GPIO Pin Matrix
Size
Document Number
Rev
B
SCH-27897
PDF: SPF-27897
B
Date:
Friday, February 12, 2016
Sheet 15
of
15
D
C
B
A
5 4 3 2 1
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