13
CJ1-H and CJ1M CPU Unit Features Section 1-3
Faster Execution of
Common Instructions
Extensive research on applications of CJ1 CPU Units was used to identify the
20 most commonly used instructions of the more than 400 supported instruc-
tions (see below), and execution speed for these instructions was increased
by 10 to 20 times previous performance.
CPS (SIGNED BINARY COMPARE)
JMP (JUMP)
CPSL (DOUBLE SIGNED BINARY COMPARE)
CJP (CONDITIONAL JUMP)
XFER (BLOCK TRANSFER)
BCNT (BIT COUNTER)
MOVB (MOVE BIT)
MLPX (DATA DECODER)
MOVD (MOVE DIGITS)
BCD (BINARY-TO-BCD)
BSET (BLOCK SET)
SBS/RET (SUBROUTINE CALL/RETURN)
System Bus Speed
Doubled
The speed of transferring data between the CPU Unit and CPU Bus Units has
been doubled to increase overall system performance.
Parallel Processing of
Instructions and
Peripheral Servicing
A special mode is supported that enables parallel processing of instruction
execution and peripheral device servicing to support the following types of
application.
• Extensive data exchange with a host not restricted by the program capac-
ity in the CJ1-H CPU Unit
• Consistently timed data exchange with SCADA software
• Eliminating the effects on cycle time of future system expansion or
increases in communications
Less Cycle Time
Fluctuation for Data
Processing
Table data processing and text string processing, which often require time,
can be separated over several cycles to minimize fluctuations in the cycle time
and achieve stable I/O response.
Better Data Link and
Remote I/O Refreshing
CPU Bus Unit refresh response has been increased both by reductions in the
cycle time itself and by the addition of an immediate I/O refresh instruction for
CPU Bus Units (DLNK(226)). This instruction will refresh data links,
DeviceNet remote I/O, protocol macros, and other special data for CPU Bus
Units.
The response of a CJ1-H CPU Unit is approximately 2.4 times that of a CJ1
CPU Unit. And, for a cycle time of approximately 100 ms or higher, the
increase in the data link response is comparable to that for the cycle time.
Immediate Refreshing for
CPU Bus Units
Although previously, I/O refreshing for CPU Bus Units was possible only after
program executions, a CPU BUS I/O REFRESH instruction (DLNK(226)) has
been added to enable immediate I/O refreshing for CPU Bus Units. Data links,
DeviceNet remote I/O, an other unique CPU Bus Unit refreshing can be
refreshed along with words allocated to the CPU Bus Unit in the CIO and DM
Areas whenever DLNK(226) is executed. This is particularly effective for
longer cycle times (e.g., 100 ms or longer). (Data exchange for data links,
DeviceNet remote I/O, and other network communications are also affected
by the communications cycle time, i.e., DLNK(226) refreshes data only
between the CPU Bus Units and the CPU Unit, not the data on the individual
networks.)
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