Panasonic FP7 Series - Page 24

High-level Instructions
3-8
 Processing
Divides the target data 1 for operation by the target data 2, and sets the operation result data
and remainder.
Example 1) When the operation unit is 16-bit (US, SS)
S1: DT2, S2: DT1, D: DT3
DT0
1
DT0
1
DT1
9
DT1
9
DT2
25
DT2
25
DT3
49
DT3
2
(Quotient)
SD15
0
SD15
7
(Remainder)
Example 2) When the operation unit is 32-bit (UL, SL)
S1:TS3, S2: TS1, D: TS10
TS0
1
TS10
5
(Quotient)
TS1
9
TS11
0
TS2
25
TS12
0
TS3
49
TS13
0
SD15
0
SD15
4
(Remainder)
SD16
0
SD16
0
 Precautions during programming
 When a division overflow occurs, the data is output as follows. (When the negative min.
value / -1)
Operation unit SS:
S1 = -32768(H8000)
S2 = -1(HFFFF)
D = -32768(H8000)
SD15 = 0(H0000)
Operation unit SL:
S1 = -2147483648(H80000000)
S2 = -1(HFFFFFFFF)
D = -2147483648(H80000000)
SD15 = 0(H00000000)
 Flag operation
Name
Description
Latest error
(SR7)
Hold error
(SR8)
To be set in case of out-of-range values in indirect access (index modification, pointer access).
To be set when zero is specified for [S2].