26 CPU DATA (HANDSET)
26.1. IC1 (BBIC)
Pin No Description I/O Connection at Normal mode at Reset mode
1 VDDIO - - - -
2 VSS - - - -
3 AD8 D,O AD8 O O-H
4 AD9 D,O AD9 O O-H
5 AD10 D,O AD10 O O-H
6 AD11 D,O AD11 O O-H
7 AD12 D,O AD12 O O-H
8 AD13 D,O AD13 O O-H
9 AD14 D,O AD14 O O-H
10 P3_7/PD7 D,O P3_7 O O-Hi-Z
11 P3_1/PD1 D,O P3_1 O O-Hi-Z
12 P3_5/PD5 D,O P3_5 O O-Hi-Z
13 P3_4/PD4 D,O NC O O-Hi-Z
14 P3_3/PD3 D,O CD_AMP O O-Hi-Z
15 P3_2/PD2 D,O NC O O-Hi-Z
16 VDD - - - -
17 VSS - - - -
18 RFCLK D,O RFCLK O O
19 VDDRF - VDDRF - -
20 VSSRF - VSSRF - -
21 Xtal1 A,I Xtal1 I -
22 CAP A,I CAP I -
23 AVS - AVS - -
24 AVD - AVD - -
25 RSSI A,I RSSI I I
26 RDI D,I RDI I I
27 CMPREF A,I NC OPEN I
28 TDO A,O TXDA A,O Hi-Z
29 AD15 D,O AD15 O O-H
30 AD16 D,O AD16 O O-H
31 AD17 D,O AD17 O O-H
32 AD18 D,O AD18 O O-H
33 AD19 D,O AD19 O O-H
34 AD20 D,O NC O O-H
35 AD21 D,O NC O O-H
36 AD22 D,O NC O O-H
37 AD23 D,O NC O O-H
38 LE D,O LE D,O O
39 SO D,O SIO D,O O-Hi-Z
40 SK D,O SK D,O O
41 DAC/ADC2 A,I NC I I
42 P3_6/PD6 D,O P3_6 D,O O-Hi-Z
43 RDN D,O RE O O-H
44 WRN D,O WR O O-H
45 MI/READY D,O NC OPEN I-PU
46 SCLK D,O NC OPEN O-H
47 UTX/P0_0 D,O UTX O I
48 URX/P0_1 D,I URX I I
49 JTIO/P0_2 D,I JTAG I I
50 PCM_FSC1/P0_3 D,I/O COL4 OPEN I-PU
51 PCM_FSC0/P0_4 D,I/O COL3 OPEN I-PU
52 PCM_CLK/P0_5 D,I/O COL2 OPEN I-PU
53 PCM_DOUT/P0_6 D,I/O COL1 OPEN I-PU
54 PCM_DINP/P0_7 D,I/O COL0 OPEN I-PU
55 VDDIO - VDDIO - -
56 VSS - VSS - -
57 INT0n/P1_0 D,I ROW2 I I-PU
58 INT1n/P1_1 D,O ROW1 I I-PU
59 INT2n/P1_2/ACS1 D,O NC OPEN I-PU
60 ACS0 D,O CE_FLASH O O-H
61 INT3n/P1_3/ACS2 D,O CS_LCD OPEN I-PU
62 INT4n/P1_4 D,O ROW0 I I-PU
78
KX-TCD300FXS / KX-TCD300FXT / KX-TCA130FXS / KX-TCA130FXT