Philips 32PFL5605D/78 - Page 30

Circuit Descriptions
EN 30 LC9.3L LA7.
2010-Mar-26
Figure 7-2 Architecture LC9.3L LA chassis - detailed
18970_202_100325.eps
100325
CVI1/2+Audio L/R
AV IN Audio L/R
OFDM
demod
CVBS
2 × CVI
Quad LVDS
1920 × 1080p@ 100Hz
HDMI v1.3
USB2.0
- JPEG
-MP3
- MPEG4
SPDIF out
2pcs 32 M × 32 (1Gbit)
GDDR
3
DC-DC
12V
3V3
stby
Serial TS
SPDIF
5V
3V3
1V0
5
1V8
1V2
Sharp
4:1 Mux
(ADV3002
)
8V
audi
o
DVI Audio
5V
I/O:PWM/Backlight
Tcon/PSU/.. controls
uP
Mux
ADC
Video/Audio
processor
Pixel
processing
/Scaler
MT5392
1.8V
5V
3V3
3.3V
Ambilight
1 Gbit NAND
VGA
EDID
EDID
Power
amplifier