Philips 32PFL5605D/78 - Page 38

IC Data Sheets
EN 38 LC9.3L LA8.
2010-Mar-26
8.3 Diagram B06 SSB: HDMI & Multiplexer, Type ADV3002 (IC7900), HDMI MUX
Figure 8-3 Internal block diagram and pin configuration
18700_301_090828.eps
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Block diagram
Pinning information
2
IN_B_CLK+
3
HPD_B
4
IN_B_DATA0–
7
IN_B_DATA1–
6
HPD_A
5
IN_B_DATA0+
1
IN_B_CLK–
8
IN_B_DATA1+
9
AVCC
10
IN_B_DATA2–
12
SEL0
13
IN_A_CLK–
14
IN_A_CLK+
15
SEL1
16
IN_A_DATA0–
17
IN_A_DATA0+
18
AVCC
19
IN_A_DATA1–
20
IN_A_DATA1+
11
IN_B_DATA2+
59
58
57
54
55
56
60
53
52
IN_C_DATA2–
HPD_C
IN_C_DATA1+
IN_C_DATA0+
HPD_D
IN_C_DATA1–
IN_C_DATA2+
IN_C_DATA0–
AVCC
51
IN_C_CLK+
49
I2C_ADDR0
48
IN_D_DATA2+
47
IN_D_DATA2–
46
AVEE
45
IN_D_DATA1+
44
IN_D_DATA1–
43
AVCC
42
IN_D_DATA0+
41
IN_D_DATA0–
50
IN_C_CLK–
21
AVEE
22
IN_A_DATA2–
23
IN_A_DAT
A2+
24
TX_EN
25
OUT_D
AT
A2+
26
OUT_DATA2–
27
I2C_SCL
28
OUT_D
ATA1+
29
OUT_DATA1–
30
AVEE
31
OUT_D
AT
A0+
32
OUT_DATA0–
33
AVCC
34
OUT_CLK+
35
OUT_CLK–
36
RESETB
37
IN_D_CLK–
38
IN_D_CLK+
39
I2C_ADDR1
40
I2C_SDA
80
P5V_A
79
P5V_B
78
P5V_C
77
P5V_D
76
DDC_SDA_A
75
DDC_SCL_A
74
DDC_SDA_B
73
DDC_SCL_B
72
DDC_SDA_C
71
DDC_SCL_C
70
DDC_SDA_D
69
DDC_SCL_D
68
DDC_SDA_COM
67
DDC_SCL_COM
66
CEC_IN
65
CEC_OUT
64
AMUXVCC
63
EDID_ENABLE
62
EDID_SDA
61
EDID_SCL
PIN 1
ADV3002
TOP VIEW
(Not to Scale)
SERIAL
I2C_SDA
I2C_SCL
I2C_ADDR[1:0]
AVCC
AVCC
CEC_IN
IN_x_CLK+
IN_x_CLK–
IN_x_DATA2+
IN_x_DATA2–
IN_x_DATA1+
IN_x_DATA1–
IN_x_DATA0+
IN_x_DATA0–
DDC_xxx_ A
DDC_xxx_B
DDC_xxx_C
DDC_xxx_D
P5V_A
P5V_B
P5V_C
P5V_D
HPD_A
HPD_B
HPD_C
HPD_D
HOT PLUG DETECT
EDID
DDC/CEC
TMDS
EDID EEPROM INTERFACE
ADV3002
4
4
2
4
4
4
2
2
2
2
2
2
4
4
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
AVCC
AVCC
AVCC
AVEE
OUT_CLK+
OUT_CLK–
OUT_DATA2+
OUT_DATA2–
OUT_DATA1+
OUT_DATA1–
OUT_DATA0+
OUT_DATA0–
DDC_SCL_COM,
DDC_SDA_COM
CEC_OUT
EDID_ENABLE
EDID_SCL,
EDID_SDA
AMUXVCC
BIDIRECTIONAL
SEL[1:0] TX_EN
RESETB
CONFIG
INTERFACE
CONTROL
LOGIC
LOS
EQ
SWITCH
CORE
SWITCH
CORE
3.3V 3.3V
REPLICATOR
CONTROL
5V
COMBINER
HPD
CONTROL
PARALLEL