Pioneer PDP-6071PU - Page 220

PDP-6071PU
220
1234
1234
C
D
F
A
B
E
Sil9023CTU (MAIN ASSY : IC5401)
• HDMI Rx
Block Diagram
HDCP
Decryption
Engine
Registers
----------------
Configuration
Logic Block
XOR
Mask
I
2
C
Slave
24
DE
Q[23:0]
R1XC
±
R1X0±
R1X1±
R1X2±
INT
RESET#
SPDIF
MCLKOUT
PanelLink
TMDS
TM
Digital
Core
MCLK
Gen
HSYNC
VSYNC
ODCK
SD0
SCK
WS
I
2
C
Slave
CSDA
CSCL
R0XC
±
R0X0±
R0X1±
R0X2±
PanelLink
TMDS
TM
Digital
Core
Port
MUX
24-Bit
Data
DSDA1
DSCL1
Port
MUX
DSDA0
DSCL0
HDCP Keys
EEPROM
24-Bit
Data
SCDT
XTALIN
XTALOUT
Control Signals
Video Color
Space
Converter
Up/Down
Sampling
24-Bit Encrypted
Pixel Data
MUTEOUT
Audio
Data
Decode
HDMI
Mode
Control
Aux
Data
24-Bit
Decrypted
Pixel Data
CLK48B
HS,VS,
DE
HS,VS,
DE
Auto A/V
Exception
Handling
R0PWR5V
R1PWR5V
Port
Detect
EVNODD