Quectel EC25-AUX

LTE Standard Module Series
EC25 Hardware Design
EC25_Hardware_Design 32 / 130
V
OH
min=2.14V
V
IL
max=0.71V
V
IH
min=1.78V
SGMII_
MCLK
122 DO
SGMII MDIO
(Management Data
Input/Output) clock
For 1.8V:
V
OL
max=0.45V
V
OH
min=1.4V
For 2.85V:
V
OL
max=0.35V
V
OH
min=2.14V
1.8V/2.85V power
domain.
If unused, keep it
open.
USIM2_VDD 128 PO
SGMII MDIO pull-up
power source
Configurable power
source.
1.8V/2.85V power
domain.
External pull-up for
SGMII MDIO pins.
If unused, keep it
open.
SGMII_TX_M 123 AO
SGMII transmission
- minus
Connect with a 0.1uF
capacitor, and is
close to the PHY side.
If unused, keep it
open.
SGMII_TX_P 124 AO
SGMII transmission
- plus
Connect with a 0.1uF
capacitor, and is
close to the PHY side.
If unused, keep it
open.
SGMII_RX_P 125 AI
SGMII receiving
- plus
Connect with a 0.1uF
capacitor, and is
close to EC25
module.
If unused, keep it
open.
SGMII_RX_M 126 AI
SGMII receiving
- minus
Connect with a 0.1uF
capacitor, and is
close to EC25
module.
If unused, keep it
open.
Wireless Connectivity Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment