Quectel EC25-AUX

LTE Standard Module Series
EC25 Hardware Design
EC25_Hardware_Design 59 / 130
The following figure shows a reference design of wireless connectivity interfaces with Quectel FC20
module.
PM_ENABLE 127 DO WLAN power control
1.8V power domain
Active high.
WAKE_ON_
WIRELESS
135 DI
Wake up the host (EC25 module) by
FC20 module
1.8V power domain
COEX_UART_RX 137 DI LTE/WLAN&BT coexistence signal
1.8V power domain.
Cannot be pulled up
before startup.
COEX_UART_TX 138 DO LTE/WLAN&BT coexistence signal
1.8V power domain.
Cannot be pulled up
before startup.
WLAN_SLP_CLK 118 DO WLAN sleep clock
BT Part
BT_RTS 37 DI BT UART request to send 1.8V power domain
BT_TXD 38 DO BT UART transmit data 1.8V power domain
BT_RXD 39 DI BT UART receive data 1.8V power domain
BT_CTS 40 DO BT UART clear to send
1.8V power domain.
Cannot be pulled up
before startup.
PCM_IN
1)
24 DI PCM data input 1.8V power domain
PCM_OUT
1)
25 DO PCM data output 1.8V power domain
PCM_SYNC
1)
26 IO
PCM data frame synchronization
signal
1.8V power domain
PCM_CLK
1)
27 IO PCM data bit clock 1.8V power domain
BT_EN 139 DO
BT function control via FC20
module.
1.8V power domain
Active high.