LTE-A Module Series
EG06 Hardware Design
EG06_Hardware_Design 8 / 89
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 17
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 19
FIGURE 3: DRX RUN TIME AND CURRENT CONSUMPTION IN SLEEP MODE ......................................... 31
FIGURE 4: SLEEP MODE APPLICATION VIA UART ...................................................................................... 32
FIGURE 5: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 32
FIGURE 6: SLEEP MODE APPLICATION WITH RI ......................................................................................... 33
FIGURE 7: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION................................................ 34
FIGURE 8: POWER SUPPLY LIMITS DURING TX POWER ........................................................................... 36
FIGURE 9: STAR STRUCTURE OF THE POWER SUPPLY ........................................................................... 36
FIGURE 10: REFERENCE CIRCUIT OF POWER SUPPLY ............................................................................ 37
FIGURE 11: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................. 38
FIGURE 12: TURN ON THE MODULE USING KEYSTROKE ......................................................................... 38
FIGURE 13: TIMING OF TURNING ON MODULE ........................................................................................... 39
FIGURE 14: TIMING OF TURNING OFF MODULE ......................................................................................... 40
FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 41
FIGURE 16: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 41
FIGURE 17: TIMING OF RESETTING MODULE ............................................................................................. 42
FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 43
FIGURE 19: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR 43
FIGURE 20: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 45
FIGURE 21: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 48
FIGURE 22: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 48
FIGURE 23: PRIMARY MODE TIMING ............................................................................................................ 49
FIGURE 24: AUXILIARY MODE TIMING .......................................................................................................... 50
FIGURE 25: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC ................................... 51
FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR ......................................................... 53
FIGURE 27: REFERENCE CIRCUITS OF STATUS ........................................................................................ 54
FIGURE 28: REFERENCE CIRCUIT OF SD CARD APPLICATION ................................................................ 58
FIGURE 29: SPI INTERFACE TIMING ............................................................................................................. 59
FIGURE 30: SPI INTERFACE REFERENCE CIRCUIT WITH A LEVEL TRANSLATOR ................................ 60
FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 61
FIGURE 32: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE ............................................................ 66
FIGURE 33: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB ..................................................................... 67
FIGURE 34: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB ................................................. 67
FIGURE 35: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE
GROUND) .................................................................................................................................................. 67
FIGURE 36: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE
GROUND) .................................................................................................................................................. 68
FIGURE 37: REFERENCE CIRCUIT OF GNSS ANTENNA............................................................................. 69
FIGURE 38: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ............................................... 71