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Quectel SG560D Series - I2 S Interfaces

Quectel SG560D Series
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Smart Module Series
SG560D_Series_Hardware_Design 70 / 134
4.8. I2S Interfaces
The module supports up to five groups of I2S interfaces. Two of them are default configurations, see
Table 22 for details. Three of them can be multiplexed from other interfaces, see Table 25 for details.
Table 22: Pin Definition of I2S Interfaces
SPI_MOSI
194
DO
SPI master-out slave-in
Pin Name
Pin No.
I/O
Description
MI2S_MCLK
142
DO
I2S master clock
MI2S_SCLK
140
DO
I2S serial clock
MI2S_WS
137
DO
I2S word select
MI2S_DATA0
133
DIO
I2S data channel 0
MI2S_DATA1
136
DIO
I2S data channel 1
LPI_MI2S_SCLK
138
DO
LPI I2S serial clock
LPI_MI2S_WS
139
DO
LPI I2S word select
LPI_MI2S_DATA0
135
DIO
LPI I2S data channel 0
LPI_MI2S_DATA1
134
DIO
LPI I2S data channel 1
LPI_MI2S_DATA2
130
DIO
LPI I2S data channel 2
LPI_MI2S_DATA3
131
DIO
LPI I2S data channel 3
CODEC_RST_N
126
DO
Audio codec reset

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