Quectel SG560D Series - LCM Interface

Smart Module Series
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4.11. LCM Interface
The module provides one LCM interface based on MIPI_DSI standard. The interface supports one group
of 4-lane high-speed differential data transmission with maximum speed rate of 2.5 Gbps/lane and
supports FHD + (1200 × 2520) @144 fps. The pin definition of the LCM interface is shown below.
Table 26: Pin Definition of LCM Interface
Pin Name
Pin No.
I/O
Description
Comment
PWM1
340
DO
PWM output 1
Backlight control.
DSI_CLK_P
366
AO
LCD MIPI clock (+)
Requires differential
impedance of 85 Ω.
DSI_CLK_N
370
AO
LCD MIPI clock (-)
DSI_LN0_P
380
AO
LCD MIPI lane 0 data (+)
DSI_LN0_N
377
AO
LCD MIPI lane 0 data (-)
DSI_LN1_P
376
AO
LCD MIPI lane 1 data (+)
DSI_LN1_N
373
AO
LCD MIPI lane 1 data (-)
DSI_LN2_P
372
AO
LCD MIPI lane 2 data (+)
DSI_LN2_N
369
AO
LCD MIPI lane 2 data (-)
DSI_LN3_P
368
AO
LCD MIPI lane 3 data (+)
DSI_LN3_N
365
AO
LCD MIPI lane 3 data (-)
LCD_TE
374
DI
LCD tearing effect
1.8 V power domain.
LCD_RST
378
DO
LCD reset
1.8 V power domain.
External pull-up is not
required.