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RAM DBS II User Manual

RAM DBS II
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RAM DBS II
Refrigeration Solid State Starter
1.7.1 Trip Conditions
Multiple trip conditions can be detected and displayed in either DBS control mode. The detection of a trip
condition while the motor is running will cause it to stop. Refer to the Set Point Menu (Section 9, Table 13)
for trip set points and defaults.
SHORT CIRCUIT - This trip will occur if the current exceeds 800% FLA while the DBS is in the START
state. This condition will activate the circuit breaker shunt trip.
THERMAL OVERLOAD - This trip will occur when the calculated thermal energy stored in the motor
exceeds 100% of the motors thermal capacity. The motor will be allowed to start again when the motor
has sufficiently cooled.
SHORTED SCR - This trip will occur if one or more of the SCRs is shorted. A trip will occur if line
voltage / 1.73 is not present from line to load across each phase of the starter when the motor is
properly connected. This voltage is checked only after a run signal is received. This trip will also occur
if current flow is detected when the motor is not running. This current is an indication of a "runaway"
motor and will result in the activation of the shunt trip.
PHASE REVERSAL - This trip will occur if phase rotation on the incoming power is not: L1 - L2 - L3. A
reversal condition is checked only after a run signal is received and can be corrected by swapping any
two line input phases. Control power must be cycled to clear this fault.
PHASE LOSS - This trip will occur if one or more of the incoming voltage phases is lost when the motor
is not running. This voltage is checked only after a run signal is received. This trip will also occur if one
or more of the current feedback signals on TB2 of the power board is lost when the motor is running.
HEAT SINK OVERTEMPERATURE - This trip will occur when the DBS heat sink temperature has
exceeded safe operating conditions.
PLL FAILURE - Indicates poor power quality.
This check is performed only when the DBS is in the START state.
JAM - This trip will occur if the current is above the Jam Current Level and the Jam run delay has
expired. This trip will occur only in the run state.
1.7.2 Alarm Condition
An alarm condition will be annunciated on the KL4 control/display unit and cause the yellow Alarm LED on
the DBS control board to light. - Refer to Set Point Menu, Section 9, Table 13, for alarm set points and
defaults.
CURRENT UNBALANCE - This alarm will be activated when the current unbalance % exceeds the
Current Unbalance level and the Current Unbalance Delay has expired.
4
a 33 A
1
+ 29A
2
+ 34 A
3
= 96 A
TOTAL
__________________________ = 32 A
AVERAGE
3
b 33 A
1
- 32 A
AVERAGE
= 1 A
29 A
2
- 32 A
AVERAGE
= -3 A Largest value: 3 A
DEVIATION
34 A
3
- 32 A
AVERAGE
= 2 A
c3 A
DEVIATION
________ x 100% = 9.4%
32 A
AVERAGE
Example
1.0 Description
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RAM DBS II Specifications

General IconGeneral
BrandRAM
ModelDBS II
CategoryController
LanguageEnglish