Renesas RC22312A - Functional Description; Operational Characteristics; Hardware Setup and Configuration

RC22312A/RC32312A Evaluation Board Manual
R31UH0022EU0100 Rev.1.00
Mar 28, 2023
Page 4
1. Functional Description
The evaluation kit is used to demonstrate the RC22312A/RC32312A, a fully integrated clock
synthesizer/generator and clock jitter attenuator. The kit can be used to evaluate major parameters including
phase noise, spurious attenuation, clock frequency, output skew, phase alignment, device timing, and the signal
waveform. The device on the board accepts any input frequency from 1kHz to 1GHz.
The RC22312A/RC32312A consists of a single APLL and DPLL design that allows for two separate frequency
domains. The APLL can be used independently of the DPLL to generate synthesized clocks at the outputs that
track the frequency of the input at the XIN pin. The DPLL can be used for jitter attenuation, clock filtering, and
frequency translation while tracking clocks from the CLKIN pins. The DPLLs provide a programmable bandwidth
and a DCO function for real-time frequency/phase adjustment.
1.1 Operational Characteristics
The board is equipped with on-board LDOs that require a 5V supply. If connecting to a high-speed USB
interface, the evaluation board may be powered directly from the USB connection. The board is designed to
operate over the industrial temperature range from -40°C to +85°C, ambient temperature.
It is recommended to use proper grounding during board operations to avoid ESD damage to the EVB.
1.2 Hardware Setup and Configuration
The following sections describe the crystal, input clock, serial, GPIO, and output and power functions used for
setting up device testing.