RL78/G13 APPENDIX A REVISION HISTORY
R01UH0146EJ0100 Rev.1.00 1066
Sep 22, 2011
(5/7)
Page Description Classification
CHAPTER 12 SERIAL ARRAY UNIT
Though out
Addition of description of CSI30, CSI31, UART3, IIC30, IIC31 (corresponding to 128-pin products) (c)
Though out
Change of description to be corresponded to 128-pin products (c)
p. 536, 537,
574, 631 to
634, 638, 658
to 662
Change of description to CSI-UART channel corresponding SNOOZE mode (c)
p. 543, 638,
641, 642, 651
Change of description to UART channel corresponding 9-bit data communication (c)
p. 535
Change of caution in CHAPTER 12 SERIAL ARRAY UNIT (c)
p. 538
Change of description in 12.1.3 Simplified I
2
C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30,
IIC31)
(c)
p. 540
Change of note 1 in Table 12-1. Configuration of Serial Array Unit) (c)
p. 542
Change of Figure 12-2. Block Diagram of Serial Array Unit 1 (c)
p. 544
Addition of note to Figure 12-3 and 12-4 (c)
p. 546
Change of caution 1 in Figure 12-5. Format of Peripheral Enable Register 0 (PER0) (c)
p. 548
Change of Figure 12-6. Format of Serial Clock Select Register m (SPSm) (c)
p. 551, 552
Change of note 2 and caution in Figure 12-8. Format of Serial Communication Operation
Setting Register mn (SCRmn)
(c)
p. 553
Change of description in 12.3 (5) Higher 7 bits of the serial data register mn (SDRmn) (c)
p. 558
Addition of caution 2 to Figure 12-12. Format of Serial Channel Start Register m (SSm) (c)
p. 563
Change of description in 12.3 (13) Serial output level register m (SOLm) (c)
p. 564
Change of note and addition of caution to 12.3 (14) Serial standby control register m (SSCm) (c)
p. 565
Change of Figure 12-19. Format of Input Switch Control Register (ISC) (c)
p. 584, 586,
593, 595, 602,
604, 611, 613,
620, 628, 630,
632, 634
Change of flowchart for each operation mode (c)
p. 654
Change of Figure 12-86. Initial Setting Procedure for UART Reception (c)
p. 655
Change of Figure 12-88. Procedure for Resuming UART Reception (c)
p.680, 686,
690
Change of note in 12.8.1 Address field transmission to 12.8.3 Data reception (c)
CHAPTER 13 SERIAL INTERFACE IICA
p. 709, 710
Change of Figure 13-6. Format of IICA Control Register 00 (IICCTL00) (c)
p. 713
Change of Figure 13-7. Format of IICA Status Register 0 (IICS0) (c)
p. 720
Change of 13.4.2 Setting transfer clock by using IICWL0 and IICWH0 registers (c)
p. 779
Change of description in Figure 13-33. Example of Slave to Master Communication (8-Clock
Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (1/3)
(c)
CHAPTER 14 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
p. 792
Change of Figure 14-6. Timing Diagram of Multiplication (Unsigned) Operation (2 × 3 = 6) (c)
p. 794
Change of description in 14.4.3 Multiply-accumulation (unsigned) operation (c)
p. 795
Change of Figure 14-8. Timing Diagram of Multiply-Accumulation (Unsigned) Operation (2 ×
3 + 3 = 9 → 32767 × 2 + 4294901762 = 0 (over flow generated))
(c)
p. 796
Change of description in 14.4.4 Multiply-accumulation (signed) operation (c)
p. 797
Change of Figure 14-9. Timing Diagram of Multiply-Accumulation (signed) Operation
(2 × 3 + (− 4) = 2 → 32767 × (− 1) + (− 2147483647) = − 2147450882 (overflow occurs.))
(c)
Remark “Classification” in the above table classifies revisions as follows.
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
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