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Renesas RL78/G1D User Manual

Renesas RL78/G1D
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RL78/G13 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 685
Sep 22, 2011
Figure 12-108. Flowchart of Address Field Transmission
Starting IIC communication
Writing 0 to the SOmn bit
Address field
transmission completed
Specify the initial settings
while the SEmn bit of
serial channel enable
status register m (SEm) is
0 (operation is stopped).
SMRmn, SCRmn: Setting communication
SPSm, SDRmn[15:9]: Setting transfer rate
Transfer end interrupt
g
enerated?
No
Yes
Writing address and R/W
data to SIOr (SDRmn[7:0])
Writing 1 to the SSmn bit
Parity error (ACK error) flag
PEFmn = 1 ?
No
Yes
ACK reception error
To data transmission flow
and data reception flow
Writing 1 to the SOEmn bit
Writing 0 to the CKOmn bit

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Renesas RL78/G1D Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1D
CategoryComputer Hardware
LanguageEnglish

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