Renesas RL78/G1D User Manual

RL78/G13 CHAPTER 13 SERIAL INTERFACE IICA
R01UH0146EJ0100 Rev.1.00 744
Sep 22, 2011
Figure 13-29. Master Operation in Multi-Master System (2/3)
STT0 = 1
Wait
Slave operation
Yes
MSTS0 = 1?
EXC0 = 1 or COI0 =1?
Prepares for starting communication
(generates a start condition).
Secure wait time
Note
by software.
Waits for bus release
(communication being reserved).
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
No
INTIICA0
interrupt occurs?
Yes
Yes
No
No
A
C
STT0 = 1
Wait
Note
Slave operation
Yes
IICBSY0 = 0?
EXC0 = 1 or COI0 =1?
Prepares for starting communication
(generates a start condition).
Disables reserving communication.
Enables reserving communication.
Waits for bus release
Detects a stop condition.
No
No
INTIICA0
interrupt occurs?
Yes
Yes
No
Yes
STCF0 = 0?
No
B
D
C
D
Communication processing Communication processing
Note The wait time is calculated as follows.
(IICWL0 setting value + IICWH0 setting value + 4) × fCLK + tF × 2 [clocks]
Remark IICWL0: IICA low-level width setting register 0
IICWH0: IICA high-level width setting register 0
t
F: SDAA0 and SCLA0 signal falling times
f
CLK: CPU/peripheral hardware clock frequency

Renesas RL78/G1D Specifications

General

Brand	Renesas
Model	RL78/G1D
Category	Computer Hardware
Language	English