-41-
67 MD2 MD2 Operation mode control 2 I Fixed H
68 PF7/¢ ¢ ¢ output O -
69 PF6/AS AS AS output O -
70 PF5/RD RD Read signal O Control for SRAM
71 PF4/HWR HWR Write signal (upper 8 bit) O Control for SRAM
72 PF3/LWR/ADTRG/IRQ3 IRO_CS Color uniformity correction (E7050) Chip Select O L: active
73 PF2/WAIT TURBO_CS Turbo gate array Chip Select O H: active
74 PF1/BACK/BUZZ SDA 4 IIC Bus 4 SDA I/O L: active
75 PF0/BREQ/IRQ2 FLASH_MODE FWE control O
76 P30/TxD0 PW TX PW365 TxD O L: active
77 P31/RxD0 PW RX PW365 RxD I L: active
78 P32/SCK0/SDA1/IRQ4 SDA 2 IIC Bus 2 SDA I/O L: active
79 P33/TxD1/SCL1 SCL 2 IIC Bus 2 SCL O L: active
80 P34/RxD1/SDA0 SDA 1 IIC Bus 1 SDA (EEPROM,DAC-1) I/O L: active
81 P35/SCK1/SCL0/IRQ5 SCL 1 IIC Bus 1 SCL (EEPROM,DAC-1) O L: active
82 P36 BLAST_SW Lamp ballast 400VON/OFF O H: on
83 P77/TXD3 MCI TX Viewer TxD O L: active
84 P76/RXD3 MCI RX Viewer RxD I L: active
85 P75/TMO3/SCK3 SCL 4 IIC Bus 4 SCL O L: active
86 P74/TMO2/MRES M-RESET Manual reset I L: reset
87 P73/TMO1/CS7 PW_IN0 PW365 data input 0 I
88 P72/TMO0/CS6 PW_IN1 PW365 data input 1 I
89 P71/TMRI23/TMCI23/CS5 Not used O Fixed L
90 P70/TMRI01/TMCI01/CS4 Not used O Fixed L
91 PG0/IRQ6 SDATA Serial data output O L: active
92 PG1/CS3/IRQ7 USB_INTR USB interrupt signal input I L active
93 PG2/CS2 CS 2 SRAM Chip Select O L: active
94 PG3/CS1 CS 1 USB Chip Select O L: active
95 PG4/CS0 CS 0 Not used O Fixed L
96 PE0/D0 SDA 3 IIC Bus 3 SDA I/O L: active
97 PE1/D1 SCL 3 IIC Bus 3 SCL O L: active
98 PE2/D2 PW_OUT0 PW365 Data output 0 O
99 PE3/D3 PW_OUT1 PW365 Data output 1 O
100 PE4/D4 PW_RESET PW365 Reset output O Reset L -> H -> L
Pin No. Name Function Name Function I/O Action
Control Port Functions
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