92
27DV-S100
27DV-CS10
BCK
LRCK
NA
NA
SCLK
DATA
TEST1
TEST2
RST
ML
MC
MDI
MDO
Sirial
I/F
Mulcher Level
Data-Sigma
Modulator
DAC
DAC
CR LPF
+
Output Amp
CR LPF
+
Output Amp
V
OUT
L
V
OUT
R
V
COM
L
V
COM
R
V
CC
R
V
CC
L
V
CC
V
DD
CLKO
ZEROL
ZEROR
DGND
AGND
AGNDL
GNDR
Power Supply.
x8 (x4)
Oversampling
Dijital Filter
+
Mulcher
Function
Controller
Zero detection
System Clock
Clock
Manager
Function
Control
Pin No. Terminal name I/O Operation function
1 LRCK I LRCK clock input (fs)
(1)
2 DATA I Audio • Data input
(1)
3 BCK I Bit clock input for data.
(1)
4 CLKO O System clock buffered output.
5 SCLK I System clock input.
6 DGND – Digital ground.
7VDD – Digital power supply +3.3V
8 TEST1 I Test pin
(2)
(Open or ground)
9 TEST2 I Test pin
(2)
(Open or ground)
10 VCCR – Rch, Analog power supply +5V
11 AGNDR – Analog ground, Rch
12 VCOMR – Rch Analog output amp. • common
13 VOUTR O Rch Analog voltage output.
14 AGND – Analog • ground
15 VCC – Analog power supply +5V
16 VOUTL O Lch Analog voltage output
17 VCOML – Lch Analog output amp • common
18 AGNDL – Analog ground, Lch
19 VCCL – Lch, Analog power supply +5V
20 NA I Not connected.
21 NA I Not connected.
22 RST I
Reset
23 ZEROL O Lch, Zero data • flug
24 ZEROR O Rch, Zero data • flug
25 MDO O Mode control, data output
(3)
26 MDI I Mode control, data input
(2)
27 MC I Mode clock
(2)
28 ML I Mode latch
(2)
Note: (1) Schmidt trigger input, 5V logic input possible. (2) Schmidt trigger input pull-down resistor. 5V logic input possible. (3) Try state output
IC1101 PCM1737 AUDIO DAC
• Block Diagram