Sharp LC-32LE700E - Page 97

LC-32/40/46LE700E/RU/S,LU700E/S,LX700E/RU,LC-52LE700E/RU/S
7 – 31
2.21. IC2701 (VHiYDA148QZ-1Y)
2.21.1 Block Diagram
2.21.2 Pin Connections and short description
Pin No. Pin Name I/O Pin Function
1 PVDDREG - The power supply terminal for regulators (PVDD).
2 AVDD - The output terminal for 3.3V regulators
3 INLP I Analog input terminal (Lch+)
4 INLM I Analog input terminal (Lch-)
5 VREF - VREF Terminal
6 INRM I Analog input terminal (Rch-)
7 INRP I Analog input terminal (Rch+)
8 AVSS - Analog ground terminal
9 PLIMIT I Power limit setting terminal
10 PVDDPR - The power supply terminal for a digital amplifier output (Rch+)
11 OUTPR O Digital amplifier output terminal (Rch+)
12 OUTPR O Digital amplifier output terminal (Rch+)
13 PVSSR - The ground terminal for a digital amplifier output (Rch)
14 OUTMR O Digital amplifier output terminal (Rch-)
15 OUTMR O Digital amplifier output terminal (Rch-)
16 PVDDMR - The power supply terminal for a digital amplifier output (Rch-)
17 SLEEPN I Sleep control terminal
18 PROTN O Error flag output terminal
19 MUTEN I Mute control terminal
20 CKOUT O The clock output terminal for a synchronization
21 CKIN I External clock input terminal
22 NCDRC0 I Non clip / DRC1/DRC2 mode-select terminal 0
23 NCDRC1 I Non clip / DRC1/DRC2 mode-select terminal 1
24 GAIN0 I GAIN setting terminal 0
25 GAIN1 I GAIN setting terminal 1
26 PVDDML - The power supply terminal for a digital amplifier output (Lch-)
27 OUTML O Digital amplifier output terminal (Lch-)