Technical specifications
10.2 Technical Specification of the CPU 416-3 PN/DP; (6ES7416-3ER05-0AB0)
S7-400 Automation System, CPU Specifications
10-26 Manual, 10/2006, 6ES7498-8AA04-8BA0
CPU and firmware version
Note:
• The accumulated number of input bytes at the slots may not exceed 244
• The accumulated number of output bytes at the slots may not exceed 244
• The maximum address area of the interface (max. 8 KB inputs /8 KB outputs)
accumulated by 125 slaves may not be exceeded
3rd interface DP slave mode
Specifications as for 1st interface
Programming
Programming language LAD, FBD, STL, SCL
Instruction set See
Instruction List
Nesting levels 8
System functions (SFC) See
Instruction List
Number of SFCs active at the same time for
every line
• DPSYC_FR
2
• D_ACT_DP
4
• RD_REC
8
• WR_REC
8
• WR_PARM
8
• PARM_MOD
2
• WR_DPARM
2
• DPNRM_DG
8
• RDSYSST
1... 8
• DP_TOPOL
1
System function blocks (SFB) See
Instruction List
Number of SFBs active at the same time
• RDREC
8
• WRREC
8
User program protection Password security
Access to consistent data in the process image Yes
CiR synchronization time
Base Load 100 ms
Time per I/O byte 40 µs
Isochronous mode
User data per clock synchronous slave Max. 244 bytes
Maximum number of bytes and slaves in a
process image partition
The following must apply:
Number of bytes/100 +
number of slaves < 40
Constant Bus Cycle Time Yes
Shortest clock pulse
Longest clock pulse
1 ms
0.5 ms without use of SFC126, 127
32 ms
see
Isochronous Mode
manual
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