PROFIBUS DP
5.1 CPU 41x-3 PN/DP as DP master / DP slave
S7-400 Automation System, CPU Specifications
Manual, 10/2006, 6ES7498-8AA04-8BA0
5-13
Rules
You must adhere to the following rules when working with the transfer memory:
● Assignment of the address areas:
– Input data of the DP slave is always output data of the DP master
– Output data of the DP slave is always input data of the DP master
● You can assign the addresses as you choose. You access the data in the user program
with load/transfer commands or with SFCs 14 and 15. You can also specify addresses
from the process image input and output table (see also section "DP address areas of the
41x CPUs").
Note
You assign addresses for the transfer memory from the DP address area of the CPU 41x.
You must not reassign the addresses you have already assigned to the transfer memory
to the I/O modules on the CPU 41x.
● The lowest address in each address area is the start address of that address area.
● The length, unit and consistency of address areas for the DP master and DP slave that
belong together must be the same.
S5 DP Master
If you use an IM 308 C as a DP master and the CPU 41x as a DP slave, the following
applies to the exchange of consistent data:
You must program FB192 in the IM 308-C so that consistent data can be transferred
between the DP master and DP slave. The data of the CPU 41x are only output or displayed
contiguously in a block with FB192.
AG S5-95 as a DP Master
If you use an AG S5-95 as a DP master, you must also set its bus parameters for the
CPU 41x as DP slave.
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