Applications
A-5
High Speed Counter Encoder Module User Manual
Configure
the counter for Divide-by-N mode as follows:
• Preset: 0
Divide-by-N counting sets the count value to zero on the first valid clock
pulse. The clock increments the count value until it is 65535. At that time
the output turns On and remains On for one clock period. The preset (0) is
loaded into the counter
, counting continues, and the output pulses each
cycle. Setting the Reset Counter flag, WY19.03, .04, .07, or .08 for the
corresponding counter 2, 3, 5, or 6, pauses the counter; clearing the Reset
Counter flag reloads the preset value (0). In this mode, the count value is
one less than the number of clocks since a reset or gate.
Configure the counter for T
riggered Strobe mode as follows:
• Preset: 1
T
riggered Strobe sets the count value to one on the first valid clock pulse.
The count value equals the number of pulses since a reset or trigger
. The
outputs remain Off. The clock increments the count value until counter
rollover at zero. At rollover
, the output turns On and remains On for one
clock period (at the count of zero). The counting continues, but the output is
no longer active. Setting the Reset Counter flag, WY19.03, .04, .07, or .08 for
the corresponding counter 2, 3, 5, or 6, or an external trigger
, repeats the
count cycle. The counting does not stop while the trigger is active.
Using Divide-by-N
Mode
Using T
riggered
Str
obe Mode