Preface
8
7SD5 Manual
C53000-G1176-C169-1
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Input signal of an analog quantity
AND gate
OR gate
Exclusive–OR gate (antivalence): output is active, if only
one of the inputs is active
Equivalence: output is active, if both inputs are active or in-
active at the same time
Dynamic inputs (edge–triggered) above with positive, below
with negative edge
Formation of one analog output signal from a number of
analog input signals
Limit stage with setting address and parameter designator
(name)
Timer (pickup delay T, example adjustable) with setting
address and parameter designator (name)
Timer (dropout delay T, example non-adjustable)
Dynamic triggered pulse timer T (monoflop)
Static memory (RS-flipflop) with setting input (S), resetting
input (R), output (Q) and inverted output (Q
)
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