Sony HCD-DP900D - IC Block Diagrams (Cont.); IC605 AK4527 Block Diagram; IC701 BA7666 FS-E2 Block Diagram; IC51 LC72131 D Block Diagram

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HCD-DP900D
IC51 LC72131D (MAIN BOARD (3/3))
PHASE
DETECTOR
CHARGE PUMP
SWALLOW COUNTER
1/16, 1/17 4BITS
12BITS
PROGRAMMABLE
DRIVER
UNIVERSAL
COUNTER
REFERENCE
DIVIDER
POWER
ON
RESET
1/2
CCB
INTERFACE
2
3
4
5
6
7
8
9
10
18
17
16
15 14
13
12
11
19
20
2122
XOUT
VSS AOUT AIN
PD
VDD FMIN
AMIN NC
NC
1
XIN
DO
CL
DI
CE
IFIN
IO1
BO4
BO3
BO2
BO1
IO2
UNLOCK
DETECTOR
DATA SHIFT REGISTER LATCH
IC701 BA7666FS-E2 (MB BOARD (5/5))
MUTE
INA
GND
INB
GND
NC
INC
GND
1
2
3
4
5
6
7
8
VCC
OUT A1
OUT A2
OUT B1
OUT B2
NC
OUT C1
OUT C2
16
15
14
13
12
11
10
9
BIAS
BIAS
BIAS
6dB
6dB
6dB
75Ω
75Ω
75Ω
IC605 AK4527 (DSP BOARD (1/2))
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12 13 14 15 16 17 18 19 20 21 22
DATT DAC LPF
HPF ADC
DATT DAC LPF
DATT DAC LPF
DATT DAC LPF
DATT DAC LPF
DATT DAC LPF
HPF
MCLK
SDOUT
SDTO
12C
DZF2
RIN+
RIN–
LIN–
LIN+
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
DEM1 DEM0
TVDD
DVDD
DVSS
PDN
ICKS2 ICKS1 ICKS0
CAD1 CAD0
LOOP1 LOOP0/SDA/CDTI DIF1/SCL/CCLK DIF0/CSN P/S MCLK DZF1 AVSS AVDD FREFH VCOM
SMUTE
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
DAUX
DFSS
BICK
LRCK
SDTO
SDTI1
SDTI2
ADC
AUDIO
I/F
44 43 42 41 40 39 38 37 36 35 34
FORMAT
CONVERTER