Sony LBT-A57CD - Section 4 Diagrams (CDP-M43;M54); 4-1 Block Diagram

SECTION 4
DIAGRAMS
RF PLL Free-run Frequency Check [MAIN BOARD] 441 BLOCK DIAGRAM
Procedure : - Component side -
1. Connect frequency counter to test point (PLCK) with
lead wire.
Wakes frequency counter aie
a
a
=
TP
(PLCK)
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ier
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2.
Turn
Power
amitch
on
.
NG
:
3.
Confirm
that
reading
on
frequency
counter
is
4.
3218
AAA
Fee.
FLOR,
MHz. Lay
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OPTICAL PICK-UP BLOCK
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