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Sony Model MV-700HR - Page 53

Sony Model MV-700HR
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53
MV-700HR
MONITOR BOARD IC801 MN5814 (LCD CONTROLLER)
Pin No. Pin Name I/O Description
1 SYNCIN I
Composite sync signal input terminal Not used
2 HSYNCIN I
Horizontal sync signal input from the RGB decoder
3, 4
CPHSEL(SIDE2),
QHSEL(SIDE1)
I
Screen size selection signal input from the system controller
5 VDBIN I
Vertical sync signal input from the RGB decoder
6 HOUT O
Horizontal sync signal output to the OSD driver
7 VOUT O
Vertical sync signal output terminal Not used
8 BLACK O
Black signal output to the RGB decoder
9 to 11
VPOS3 to VPOS1
I
Vertical display position selection signal input terminal
12 LTBOX (ZOOM) I
Screen size selection signal input from the system controller "H": zoom screen
13 UD I
Above and below scan direction selection signal input terminal
"L": all inversion, normally "H" Not used
14 POL O
Polarity inversion signal of reflection and opposite output to the RGB decoder
15 INTEXT I
Composite/separate sync selection signal input terminal
16 CPV O
Gate driver clock signal output to the liquid crystal display module
17 to 19 OEV3 to OEV1 O
Gate driver output enable pulse signal output to the liquid crystal display module
20 STV1 O
Gate driver start pulse signal output to the liquid crystal display module
21 OEH O
Source driver output enable pulse signal output to the liquid crystal display module
22 QH (ZOOMC) O
Screen size selection signal output terminal Not used
23, 24 STH1, STH2 O
Source driver start pulse signal output to the liquid crystal display module
25 CPH3 O
Source driver clock signal output to the liquid crystal display module
26 STV2 O
Gate driver start pulse signal output to the liquid crystal display module
27 CPH2 O
Source driver clock signal output to the liquid crystal display module
28 L/R I
Left and right scan direction selection signal input terminal
"L": all inversion, normally "H" Not used
29 CPH1 O
Source driver clock signal output to the liquid crystal display module
30 HDOT2 I
Mode selection signal input for number of display pixel
31 JUST I
Screen size selection signal input from the system controller "H": wide screen
32
POSSET
I
Horizontal display position and vertical display position offset selection signal input terminal
33
PD
O
Phase comparation output terminal
34
QVDZMSEL
I
Screen size selection signal input terminal
35 VDD -
Power supply terminal (+3.3V)
36
VCOI
I
VCO signal and system clock signal input terminal
37 VCOO O
System clock signal output terminal
38 VSS -
Ground terminal
39 RST I
System reset signal input terminal
40 HDOT1 I
Mode selection signal input for number of display pixel
41 WH (UONS) I
Screen size selection signal input terminal
42 to 45 HPOS4 to HPOS1 I
Horizontal display position selection signal input terminal
46 NP1 I
NTSC/PAL selection signal input terminal "L": NTSC, "H": PAL
47 VDD -
Power supply terminal (+3.3V)
48 VSS -
Ground terminal

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