HCD-F200/F500
56
Pin No. Pin Name I/O Description
149 to 155 RA11, RA9 to RA4 O Address signal output to the SD-RAM
156 DVDD3 - Power supply terminal (+3.3V)
157 MUTE123 O Muting signal output to the motor/coil driver
158 MUTE O Muting signal output to the motor/coil driver
159 DDC_DA O Serial data transfer clock signal output terminal
160 DVDD18 - Power supply terminal (+1.8V)
161 DDC_CLK I/O Two-way data bus with terminal
162 HTPLG I HDMI hot-plug detection signal input terminal
163 AGND3 - Ground terminal
164 EXT_RES - Not used
165, 166 AVDD3 - Power supply terminal (+3.3V)
167 EXT_CAP - Not used
168, 169 AGND3, AGND18 - Ground terminal
170 TXCN O TMDS clock signal (negative) output to the HDMI OUT connector
171 TXCP O TMDS clock signal (positive) output to the HDMI OUT connector
172 DVDD18 - Power supply terminal (+1.8V)
173 TX0N O TMDS data (negative) output to the HDMI OUT connector
174 TX0P O TMDS data (positive) output to the HDMI OUT connector
175 DVDD18 - Power supply terminal (+1.8V)
176 TX1N O TMDS data (negative) output to the HDMI OUT connector
177 TX1P O TMDS data (positive) output to the HDMI OUT connector
178 DVDD18 - Power supply terminal (+1.8V)
179 TX2N O TMDS data (negative) output to the HDMI OUT connector
180 TX2P O TMDS data (positive) output to the HDMI OUT connector
181 AGND18 - Ground terminal
182, 183 R/Cr/Pr, B/Cb/Pb O Component video signal output to the video amplifi er
184 DACVSSA - Ground terminal
185 Y/G O Component video signal output to the video amplifi er
186 DACVDDA - Power supply terminal (+3.3V)
187 CVBS O Video signal output to the video amplifi er Not used
188 DACVSSB - Ground terminal
189 C O Chroma signal output to the video amplifi er
190 DACVDDB - Power supply terminal (+3.3V)
191 Y O Y signal output to the video amplifi er
192 DACVSSC - Ground terminal
193 FS - Full scale adjustment terminal
194 VREF - For reference voltage terminal
195 DACVDDC - Power supply terminal (+3.3V)
196 VBUS_OE O VBUS control signal output terminal
197 VBUS_OC I VBUS control signal input terminal
198 SCORE/DIR_XSTATE I Source clock switching monitor input terminal Not used
199 SPMCK O Master clock signal output terminal Not used
200 SPBCK O Bit clock signal output terminal Not used
201 SPLRCK O L/R sampling clock signal output terminal Not used
202 SPDATA I Audio serial data input terminal Not used
203 ACLK O Master clock signal output terminal Not used
204 ABCK O Bit clock signal output terminal Not used
205 ALRCK O L/R sampling clock signal output terminal Not used
206 MC_DATA/ADIN I Audio serial data input terminal Not used
207 DVDD3 - Power supply terminal (+3.3V)
208 MIC - Not used
209 WIDE O Normal/squeeze selection signal outputterminal Not used
210 REG_SEL/DSEL - Not used
211 TRG_SW I Trigger detection switch input terminal Not used
212 DVDD18 - Power supply terminal (+1.8V)
213 KMOD - Not used
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