UM1525 Hardware and layout
Doc ID 022910 Rev 2 19/41
4.8 Solder bridges
Table 5. Solder bridge settings
Bridge State
(1)
Description
SB16,17
(X2 crystal)
(2)
2. OSC_IN clock comes from MCO if SB18 is ON and SB16,17 are OFF
and comes from X2 if SB18 is OFF and SB16,17 are ON.
OFF
X2, C13, C14, R22 and R23 provide a clock. PF0, PF1 are disconnected
from P
1.
ON PF0, PF1 are connected to P1 (R22, R23
and SB18 must not be fitted).
SB6,8,10,12 (Default) ON Reserved, do not modify.
SB5,7,9,11 (Reserved) OFF Reserved, do not modify.
SB20,21
(X3 crystal)
OFF
X3, C15, C16, R24 and R25 deliver a 32 KHz clock. PC14, PC15 are not
con
nected to P1.
ON PC14, PC15 are only connected to P1 (R24, R25 must not be fitted).
SB4
(B2-RESET)
ON
B2 push button is connected to the NRST pin of the STM32F051R8T6
MCU.
OFF
B2 push button is not connected the NRST
pin of the STM32F051R8T6
MCU.
SB3
(B1-USER)
ON B1 push button is connected to PA0.
OFF B1 push button is not connected to PA0.
SB1
(VBAT powered from VDD)
ON VBAT is permanently powered from VDD.
OFF VBAT is not powered from VDD but pin3 of P1.
SB14,15
(RX,TX)
OFF Reserved, do not modify.
ON Reserved, do not modify.
SB19
(NRST)
ON
NRST signal of the CN3 connector is connected to the NRST pin of the
STM32F051R8T6 MCU.
OFF
NRST signal of the CN3 connector is not connected to the NRST pin of the
STM32F051R
8T6 MCU.
SB22
(T_SWO)
ON SWO signal of the CN3 connector is connected to PB3.
OFF SWO signal is not connected.
SB13
(STM_RST)
OFF No incidence on STM32F103C8T6 (ST-LINK/V2) NRST signal.
ON STM32F103C8T6 (ST-LINK/V2) NRST si
gnal is connected to GND.
SB2
(BOOT0)
ON
BOOT0 signal of the STM32F051R8
T6 MCU is held low through a
510 Ohm pull-down resistor.
OFF
BOOT0 signal of the STM32F051R8T6 MCU can be set high through a
10 KOhm pull-up resistor R27 to solder.
SB18
(MCO)
(2)
ON Provides the 8 MHz for OSC_IN from MCO of STM32F103C8T6.
OFF See SB16, SB17 description.
1. Default SBx state is shown in bold.
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