ST STM32G491 User Manual

High-resolution timer (HRTIM) RM0440
1068/2126 RM0440 Rev 4
27.5.78 HRTIM ADC post scaler register 1 (HRTIM_ADCPS1)
Address offset: 0x400
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. ADC5PSC[4:0] Res. ADC4PSC[4:0] Res.
ADC3P
SC[4]
rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
ADC3PSC[3:0] Res. ADC2PSC[4:0] Res. ADC1PSC[4:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:24 ADC5PSC[4:0]: ADC 5 post scaler
Refer to ADC1PSC[4:0] description.
Bit 23 Reserved, must be kept at reset value.
Bits 22:18 ADC4PSC[4:0]: ADC 4 post scaler
Refer to ADC1PSC[4:0] description.
Bit 17 Reserved, must be kept at reset value.
Bits 16:12 ADC3PSC[4:0]: ADC 3 post scaler
Refer to ADC1PSC[4:0] description.
Bit 11 Reserved, must be kept at reset value.
Bits 10:6 ADC2PSC[4:0]: ADC 2 post scaler
Refer to ADC1PSC[4:0] description.
Bit 5 Reserved, must be kept at reset value.
Bits 4:0 ADC1PSC[4:0]: ADC 1 post scaler
This bit selects the ADC 1 Post scaler ratio.

ST STM32G491 Specifications

General

Brand	ST
Model	STM32G491
Category	Microcontrollers
Language	English