ST STM32G491 User Manual

High-resolution timer (HRTIM) RM0440
1072/2126 RM0440 Rev 4
27.5.81 HRTIM fault input register 4 (HRTIM_FLTINR4)
Address offset: 0x40C
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
FLT6
RSTM
FLT6
CRES
FLT6CNT[3:0]
FLT6
BLKS
FLT6
BLKE
FLT5
RSTM
FLT5
CRES
FLT5CNT[3:0]
FLT5
BLKS
FLT5
BLKE
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 FLT6RSTM: Fault 6 reset mode
Refer to FLT5RSTM description.
Bit 14 FLT6CRES: Fault 6 counter reset
Refer to FLT5CRES description.
Bits 13:10 FLT6CNT[3:0]: Fault 6 counter
Refer to FLT5CNT description.
Bit 9 FLT6BLKS: Fault 6 blanking source
Refer to FLT5BLKS description.
Bit 8 FLT6BLKE: Fault 6 blanking enable
Refer to FLT6BLKE description.
Bit 7 FLT5RSTM: Fault 5 reset mode
This bit selects the FAULT5 counter reset mode
0: Fault 5 counter is reset on each reset / roll-over event
1: Fault 5 counter is reset on each reset / roll-over event only if no fault occurred during last counting
period.
This bitfield is written only when FLT5E enable bit is reset.
Bit 6 FLT5CRES: Fault 5 counter reset
This bit resets the FAULT5 counter. It is set by software and reset by hardware.
0: No action
1: Fault 5 counter is reset

ST STM32G491 Specifications

General

Brand	ST
Model	STM32G491
Category	Microcontrollers
Language	English