Supermicro X10SRG-F - I-Sgpio1;I-Sgpio2;S-Sgpio; TPM Header (JTPM1)

2-26
X10SRG-F Motherboard User’s Manual
X10SRG-F
REV:1.01
DESIGNED IN USA
BIOS
LICENSE
MAC CODE
IPMI CODE
BAR CODE
4
1
JVRM2
JVRM1
Intel C610
BMC
i350
JUIDB1
FAND
FAN4
FAN3
FAN2
FAN1
FANC
FANA
FANB
JTPM1
JL1
JOH1
LE2
LE1
LEDM1
S-SATA3
S-SATA2 S-SATA1
S-SATA0
I-SATA4
I-SATA3
I-SATA5
I-SATA2I-SATA1
I-SATA0
JSTBY1
JPCIE2
JPCIE3
JSD1
JSD2
JPW3
JPW2
JPW1
I-SGPIO2
I-SGPIO1
S-SGPIO
JIPMB1
JP3
JD1
JPI2C1
JPL1
JPB1
JI2C2
JWD1
JPME2
JI2C1
JBRSET1
JBR1
JPL_LAN1
JPL_LAN0
JPL_LOM_DEV_OFF
JPG1
JVR1
JPF1
JPF2
BT1
SP1
JP4
JITP1
J23
JPCIE3
JF1
SXB1B
USB 8/9(3.0)
USB 6/7
USB 4/5
USB 2/3
SATA DOM+POWER
SATA DOM+POWER
UID-SW
COM2
IPMI_LAN
VGA
CPU SLOT3 PCI-E 3.0 X8(IN X16)
SXB2B
SXB2A
SXB1A
JBT1
PWR
JF1
ON
RST
2
NIC
1
NIC
FF
OH
LEDLED
PWRHDDXNMI
DIMMB2 DIMMA1 DIMMB1 DIMMA2
LAN1
LAN2
DIMMD2 DIMMC1 DIMMD1 DIMMC2
COM1
USB 0/1(3.0)
CPU
LGA2011-3
1
1
C
Serial Link General-Purpose Headers
(SGPIO)
Pin Denitions
Pin# Denition Pin# Denition
1 NC 2 NC
3 Ground 4 DATA Out
5 Load 6 Ground
7 Clock 8 NC
A. I-SGPIO1
B. I-SGPIO2
C. S-SGPIO
D. TPM Header
B
I-SGPIO1/I-SGPIO2/S-SGPIO
Three (3) T-SGPIO (Serial-Link Gen-
eral Purpose Input/Output) headers
are located next to the I-SATA Ports
on the motherboard. These headers
are used to communicate with the
enclosure management chip in the
system. See the table on the right
for pin denitions. Refer to the board
layout below for the locations of the
headers.
Trusted Platform Module Header (JTPM1)
Pin Denitions
Pin # Denition Pin # Denition
1 LCLK 2 GND
3 LFRAME# 4 No Pin
5 LRESET# 6 +5V (X)
7 LAD3 8 LAD2
9 3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK4 (X) 14 SMB_DAT4 (X)
15 P3V3_STBY 16 SERIRQ
17 GND 18 GND
19 P3V3_STBY 20 LDRQ# (X)
TPM Header (JTPM1)
This header is used to connect a
Trusted Platform Module (TPM),
which is available from a third-party
vendor. A TPM is a security device
that supports encryption and authen-
tication in hard drives. It enables the
motherboard to deny access if the
TPM associated with the hard drive
is not installed in the system. See the
table on the right for pin denitions.
D
A