Supermicro X10SRG-F - Chipset and IIO Configuration

Chapter 4: AMI BIOS
4-11
Chipset Conguration
Warning: Setting the wrong values in the following sections may cause the system
to malfunction.
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
IIO Conguration
EV DFX (Device Function On-Hide) Feature
When this feature is set to Enable, the EV_DFX Lock Bits that are located on
a processor will always remain clear during electric tuning. The options are
Disable and Enable.
IIO1 Conguration
IOU2 (II01 PCIe Port 1)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are x4x4, X8, and Auto.
IIO1 PORT 1A Link Speed
This item congures the link speed of a PCI-E port specied by the user. The
options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).
IOU0 (II01 PCIe Port 2)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto
IIO1 PORT 2A Link Speed
This item congures the link speed of a PCI-E port specied by the user. The
options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).
IOU1 (II01 PCIE Port 3)
Use this item to congure the PCI-E port Bifuraction setting for a PCI-E port
specied by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16,
and Auto.
IIO1 PORT 3A Link Speed
This item congures the link speed of a PCI-E port specied by the user. The
options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).