Supermicro X10SRG-F - Page 9

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Table of Contents
Quiet Boot .................................................................................................. 4-4
AddOn ROM Display Mode ........................................................................ 4-4
Bootup Num-Lock ....................................................................................... 4-5
Wait For 'F1' If Error ................................................................................... 4-5
INT19 (Interrupt 19) Trap Response .......................................................... 4-5
Re-try Boot ................................................................................................. 4-5
Power Conguration ........................................................................................ 4-5
DeepSx Power Policies .............................................................................. 4-5
GP27 Wake From DeepSx ......................................................................... 4-5
Watch Dog Function ................................................................................... 4-6
Power Button Function ............................................................................... 4-6
Restore on AC Power Loss ........................................................................ 4-6

CPU Conguration ....................................................................................... 4-6
CPU1/CPU2 Conguration ......................................................................... 4-6
Clock Spread Spectrum ............................................................................. 4-7
Hyper-Threading (ALL) ............................................................................... 4-7
Cores Enabled ............................................................................................ 4-7
Execute Disable Bit (Available if supported by the OS & the CPU) .......... 4-7
PPIN Control .............................................................................................. 4-7
Hardware Prefetcher (Available when supported by the CPU) ................. 4-7
Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-7
DCU Streamer Prefetcher (Available when supported by the CPU) ......... 4-8
DCU IP Prefetcher...................................................................................... 4-8
Direct Cache Access (DCA) ....................................................................... 4-8
DCA Prefetch Delay ................................................................................... 4-8
X2APIC (Extended Advanced Programmable Interrupt Controller) ........... 4-8
AES-NI ........................................................................................................ 4-8
Intel Virtualization Technology .................................................................... 4-8
Advanced Power Management Conguration ............................................. 4-9
Chipset Conguration .................................................................................4-11
North Bridge ................................................................................................4-11
IIO Conguration .........................................................................................4-11
 Intel VT for Directed I/O (VT-d) ................................................................ 4-12
QPI (Quick Path Interconnect) Conguration ............................................ 4-12
COD Enable (Available when the OS and the CPU support this feature) .....
4-13

South Bridge ............................................................................................... 4-15
Legacy USB Support ................................................................................ 4-15
XHCI Hand-Off ......................................................................................... 4-15