Supermicro X10SRM-F - Chipset Configuration; North Bridge; Iio Configuration

X10SRM-F/-TF User's Manual
84
Chipset Conguration
Warning: Setting the wrong values in the following features may cause the system to malfunc-
tion.
North Bridge
This feature allows the user to congure the following North Bridge settings.
IIO Conguration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a processor
will always remain clear during electric tuning. The options are Disable and Enable.
Snoop Response Hold Off
Use this feature to set the snoop response hold-off value. Use the keyboard to enter a
value. The default value is 9.
IIO1 Conguration
IOU2 (II01 PCIe Port 1)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4, X8, and Auto.
CPU1 SLOT4 PCI-E 3.0 X8 Link Speed
This feature allows the user to select PCI-E support for the device installed on SLOT4. The
options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
IOU0 (II01 PCIe Port 2)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4, X8, and Auto.
CPU1 SLOT6 PCI-E 3.0 X16 Link Speed
This feature allows the user to select PCI-E support for the device installed on SLOT6. The
options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
IOU1 (II01 PCIe Port 3)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4, X8, and Auto.