DWC ADC 12b5M SAR, TSMC180 IP Databook
April 2012 Synopsys, Inc. 12-30
“calibrated” conversion cycle started immediately after the Power Up Time has elapsed,
(Power Up time corresponds to one dummy conversion cycle).
This mode of operation is useful in cases where the power down and start-up sequence is
very quick. If the ADC is in power down for extended periods, then it is recommended that a
new calibration cycle is run at power up time.
Standby Mode
The usage of the internal voltage regulator also counts with a fast start-up mode. Instead of
waiting for the internal voltage regulator start-up every time the ADC is powered on, it is
possible to keep the internal voltage regulator always enabled (enldo=H). In this way, the
start-up time will be only one conversion cycle. In this operating mode (enldo=H and
enadc=L), the current consumption is reduced to minimum. This is relevant for higher
sampling frequencies, where the current consumption in normal operation is much higher
than in standby mode.
Normal Operation
The start of a conversion is controlled by the soc signal, and the eoc indicates that a
conversion has ended.
The ADC may be configured to receiver either single-ended or differential input signals, in
the following way:
1. By setting seldiff=H, vinp18-vinn18 ... vinp2-vinn2, vinp1-vinn1 are the positive-
negative pairs of differential input signals. There is no differential mode available for
vinp0-vinn0.
2. By setting seldiff=L, vinp18..vinp0 are single ended inputs.vinn0should be always
connected to the analog ground and used as negative input for all inputs in single
ended mode.
The input is selected by sel4..0. The full-scale input range is defined as:
1. vrefp – agndref, if seldiff=L
2. 2*(vrefp – agndref), with a common mode voltage of (vrefp + agndref)/2, if seldif=H
seldiff and selres control signals must remain unchanged when a conversion is being done.
After changing seldiff, in applications where the offset is critical, a new calibration cycle must
be triggered (or loaded a calibration word using loadcal), before using the ADC to perform a
conversion. This is not necessary when simply changing selres.
Asserting resetcal will reset the internal calibration registers, therefore eliminating the
calibration coefficients.
Current Consumption during Normal Operation
This ADC is capable of very low power operation. Current consumption is determined by the
clock frequency with which the ADC is being used, scaling almost linearly with the clock
frequency, as it is shown in the above graphic.
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