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Synopsys TSMC180 - 6 Operating Modes

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DWC ADC 12b5M SAR, TSMC180 IP Databook
April 2012 Synopsys, Inc. 10-30
6 Operating Modes
This section describes the power-up sequence and the various operating modes that the
DWC ADC 12b5M SAR, TSMC180
Table 2 SAR ADC operating modes.
Mode
Configuration
selres1..0
seldiff
sel4..0
dislvl
enldo
enadc
resetadc
soc
bypasscal
startcal
loadcal
resetcal
Deep Pow er-down
X
X
X
1
0
0
X
X
X
X
X
X
Pow er-down
X
X
X
0
0
0
X
X
X
X
X
X
Standby
X
X
X
0
1
0
X
X
X
X
X
X
Normal Operation Single-ended
X
0
X
0
1
1
0
X
X
0
0
0
Normal Operation Differential
X
1
X
0
1
1
0
X
X
0
0
0
Calibration Single-ended
X
0
X
0
1
1
0
0
0
0
0
0
Calibration Differential
X
1
X
0
1
1
0
0
0
0
0
0
Bypass Calibration
X
X
X
0
1
1
0
X
1
0
0
0
Load Calibration
X
X
X
0
1
1
0
X
0
0
1
0
The following start-up sequence should be followed during system startup:
1. During the power up time of the supply voltages, ensure that enldo=L, enadc=L and
soc=L;
2. Power up both dvdd and avdd supplies;
3. Once the power supplies are stable set enldo=H and wait for the internal voltage
regulator start-up;
4. Set the resetcal signal to high during one clock cycle. There is no need to wait for the
internal voltage regulator start-up time to set resetcal to high. This signal can be set
to high right after the power supplies are stable. The only demand is to set it to high
during one clock cycle before the next step (enadc=H);
5. Set enadc=H;
6. Set the resetadc signal to high during one clock cycle;
7. For applications that require a low offset, trigger a calibration cycle using startcal, as
described in Section 8. After the calibration is complete the ADC is ready to receive
analog inputs.

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