TB9100 Reciter Service Manual Network Circuitry 59
© Tait Electronics Limited January 2006
is signified by a sequence of transitions on the SDA and SCL lines. I
2
C data
transfers must be in multiples of a byte.
Multiple devices can be connected to an I
2
C bus, with each having a unique
identifying address (see Table 8 .1 ). The I
2
C protocol incorporates an address
byte (also including a read/write flag) at the beginning of each message so
that the intended recipient can recognize it and respond appropriately.
Parallel Ports Other lines from the CPM that are not otherwise used for serial interfaces,
are used mainly as parallel inputs and outputs. These are detailed in
Ta bl e 5 .9; further description of their individual functions can be found in
the referenced paragraphs.
Input signals on input port IPA[0..7] also connect to the PCMCIA interface
input register (see “PCMCIA Interface” on page 44), so an interrupt can be
generated on a change of state on those pins. Pins on port C can also be
programmed to generate interrupts.
A hardware link, W201, is provided for enabling special modes for the ASIF.
It is connected to a general-purpose digital input, PC9, and its function is
determined in the software.
Table 5.9 Parallel I/O Ports
Pin Name Direction Function Reference
PA0 O/P Software test
output 0
PA1 O/P Software test
output 1
PA2 O/P Software test
output 2
PA3 I/P 1 PPS input/timer
input
“Timers and Baud Rate Generators” on page 54
“1 PPS Input” on page 73
PA4 O/P Status LED
PA6 O/P none
PA10 O/P none
PA11 I/P Ready sense “Board Status Signal” on page 85
PA12 O/P ASIF not ready “Board Status Signal” on page 85
PA13 O/P DSP reset “Interrupts and Reset” on page 67
PB14 O/P none
PB15 O/P Ethernet PHY
power-down
“Ethernet PHY Configuration” on page 75
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